Linear amplifier using non-linear CMOS capacitors
View Patent ↗The invention provides an amplifier circuit made by digital CMOS processes, the amplifier circuit comprising a main operational amplifier with at least one input and at least one output and a feedback loop including a non-linear gateoxide capacitor, wherein a voltage control means is connected to the main operational amplifier to provide a voltage difference between the output common mode voltage and the input common mode voltage of the main operational amplifier to apply a DC biasing voltage across the non-linear gateoxide capacitor sufficient to operate the non-linear gateoxide capacitor in a bias range where the capacity of the none-linear gateoxide capacitor is almost independent of the applied voltage comprising the bias voltage plus a signal voltage.
1. Amplifier circuit comprising a main amplifier with at least one input and at least one output and a feedback loop connected to the input and the output including a non-linear capacitor, wherein a voltage control means is connected to the main amplifier to provide a voltage difference between the output common mode voltage and the input common mode voltage of the main amplifier to apply a DC biasing voltage across the non-linear capacitor to operate the non-linear capacitor in a bias range where the capacity of the non-linear capacitor is substantially independent of the applied voltage comprising the bias voltage plus a signal voltage.
2. The circuit of claim 1 , wherein the feedback loop comprises a resistor in parallel to the non-linear capacitor.
3. The circuit of claim 1 , wherein the non-linear capacitor is a MOS transitor or a gateoxide capacitor.
4. The circuit of claim 1 , wherein the non-linear capacitor is a juntion capacitor.
5. The circuit of claim 1 , wherein the voltage control means is adapted to provide a constant DC output common mode voltage to the input of the amplifier.
6. The circuit of claim 1 , wherein the voltage control means comprises a voltage regulator for regulating the common mode output voltage of the main amplifier to the preset output common mode voltage.
7. The circuit of claim 6 , wherein the voltage regulator comprises a regulator operational amplifier one input of which is fed by a said common mode output voltage CM out , and the other input of which regulator operational amplifier is connected via a first resistor to one output of the main operational amplifier and via a second resistor to the other output of the main operational amplifier, and wherein an output of the regulator operational amplifier is connected via a third resistor to one of the inputs of the main amplifier and via a fourth resistor to another input of the main amplifier.
8. The circuit of claim 7 , wherein the first and second resistors have the same resistance value, and wherein the third and fourth resistors have the same resistance value.
9. The circuit of claim 1 , wherein the voltage control means comprises an input stage adapted to provide a constant DC common mode voltage to the input of the main amplifier circuit.
10. The circuit of claim 9 , wherein the input stage comprises a CM, DC voltage source connected to the inputs of the main amplifier circuit.
11. The circuit of claim 9 , comprising means for setting an internal voltage V T at the input stage of the main amplifier circuit.
12. The circuit of claim 1 , wherein the main amplifier circuit is made by digital CMOS processes.