IP Library Granted Patent US 7,079,061
Granted Patent B2
US 7,079,061 · App. 10/515,959 · Granted Jul 18, 2006

Sigma Delta and converter with pseudo flash converter

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Quick Facts
Patent No.
US 7,079,061
App. No.
10/515,959
Granted
Jul 18, 2006
Kind
B2
Abstract

The invention relates to a Sigma Delta A/D converter ( 2 ) for generating a N-bits digital output signal ( 4 ) on the basis of an analogue input signal ( 6 ), comprising a control loop which comprises a quantizer ( 8 ) comprising at least a comparator ( 24.1, 24.2 ) for generating the N-bits digital output signal ( 4 ) and a D/A converter ( 10 ) in a first feedback loop ( 12 ) of the control loop for generating an analogue version ( 14 ) of the N-bits digital output signal ( 4 ) on the basis of the N-bits digital output signal ( 4 ), wherein the quantizer ( 8 ) also comprises an Up-Down counter ( 26 ) which is coupled to the comparator ( 24.1, 24.2 ), wherein the D/A converter ( 10 ) is coupled to the comparator ( 24.1, 24.2 ) in a second feedback loop ( 27 ) of the control loop.

Claims (4)

1. A Sigma Delta A/D converter for generating a N-bits digital output signal on the basis of an analogue input signal, comprising a control loop which comprises a quantizer comprising at least a comparator for generating the N-bits digital output signal and a D/A converter in a first feedback loop of the control loop for generating an analogue version of the N-bits digital output signal on the basis of the N-bits digital output signal, and a combiner for generating a combined signal by combining the analogue input signal with the analogue version of the N-bits digital output signal wherein, the quantizer also comprises an Up-Down counter which is coupled to the comparator, wherein the D/A converter is coupled to the comparator in a second feedback loop of the control loop.

2. A Sigma Delta A/D converter according to claim 1 , wherein the Sigma Delta A/D converter also comprises a loopfilter for generating a filtered combined signal by filtering the combined signal, wherein the comparator is arranged for generating a control signal on the basis of the filtered combined signal and the analogue version of the N-bits digital output signal, and wherein the Up-Down counter is arranged for generating the N-bits digital output signal on the basis of the control signal.

3. A Sigma Delta A/D converter according to claim 2 , wherein the loopfilter is an integrator.

4. A Sigma Delta A/D converter according to claim 1 , wherein the quantizer comprises two comparators which are coupled to the Up-Down counter.

Assignments (4)
CHANGE OF NAME Recorded Sep 22, 2017
From: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
To: NXP B.V.
Reel/Frame 043951/0436 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2017
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
Reel/Frame 043955/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2006
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 018635/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 23, 2004
From: SCHUURMANS, HAN M.
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 017102/0331 →