Trench isolation structure, semiconductor assembly comprising such a trench isolation, and method for forming such a trench isolation
View Patent ↗The present invention provides a trench isolation structure, comprising a trench groove ( 4 ) in a semiconductor slab ( 1 ) with a buried layer ( 2 ). The trench groove ( 4 ) is lined with first insulating material ( 5 ), then filled with a first filler material ( 6 ) up to the level of the buried layer. Then second insulating material ( 7 ), for example an oxide, is preferably applied in the volume which is surrounded by the buried layer ( 2 ). The remaining part of the trench groove ( 4 ) is either filled with second filler material ( 8 ) or with second insulating material. Said structure provides lower capacitive coupling between buried layer ( 2 ) edge and substrate ( 1 ), with improved thermal behavior. The invention furthermore provides a semiconductor assembly comprising said trench isolation structure and at least one semiconductor device, as well as a method for forming such a trench isolation structure.
1. A semiconductor structure, comprising:
a slab of semiconducting material having a surface and a buried layer which extends parallel to the surface, the buried layer having an upper surface and a lower surface; and
a trench groove extending at least from the surface through the buried layer down to a part of the slab below the buried layer and
the trench groove including a liner of a first insulating material on a wall of the trench groove, and
wherein a remaining part of the trench groove is at least partially filled with a first filler material configured to provide trench isolation, and wherein the liner is characterized by an abrupt increase in thickness in at least a first part of the trench groove that is substantially in line with the buried layer, the abrupt increase in thickness defining a thickness that is larger than a thickness of the liner in a second part of the trench groove, the second part of the trench groove located below the first part.
2. A semiconductor structure according to claim 1 , characterized in that the thickness of the liner in the first part of the trench groove is larger than a thickness of the liner in a third part of the trench groove, the third part of the trench groove located above the first part of the trench groove.
3. A semiconductor structure according to claim 1 , characterized in that the trench groove is completely lined with the first insulating material.
4. A semiconductor structure according to claim 3 , characterized in that the first part of the trench groove extends substantially in line with the buried layer.
5. A semiconductor structure according to claim 1 , wherein at least one semiconductor device is at least partially present on the surface of the slab of semiconducting material, and wherein the semiconductor device is insulated by the trench isolation structure.
6. A semiconductor structure comprising:
a slab of semiconducting material having a surface and a buried layer which extends parallel to the surface;
a trench groove extending at least from the surface through the buried layer down to a part of the slab below the buried layer, the trench groove having a wall that is at least predominately lined and covered by a first insulating material from above an upper surface of the buried layer to below a lower surface of the buried layer, and the first insulating material for providing trench isolation and having a common thickness above and below the buried layer and having an increased thickness in at least part of the trench groove that is substantially in line with the buried layer; and
a first filler material at least partially filling a remaining part of the trench groove in areas above and below the buried layer.
7. A semiconductor structure according to claim 6 , characterized in that the increased thickness is defined by abrupt transitions respectively located near the upper surface of the buried layer and near the lower surface of the buried layer.
8. A semiconductor structure according to claim 6 , characterized in that the increased thickness is substantially in line with the buried layer.
9. A semiconductor structure according to claim 6 , characterized in that the part of the trench groove extends substantially in line with the buried layer.