Semiconductor device and manufacturing method thereof
View Patent ↗The semiconductor device includes a first semiconductor chip having first electrodes on a fringe region of a main surface thereof, and a second semiconductor chip smaller in area than the first semiconductor chip and having second electrodes on a main surface thereof. The first semiconductor chip and the second semiconductor chip are connected together by bonding a surface of the second semiconductor chip that is opposite to the main surface thereof to a region of the main surface of the first semiconductor chip other than the fringe region. The first electrodes are connected to the second electrodes by wirings formed over the main surface of the first semiconductor chip, a side surface of the second semiconductor chip and the main surface of the second semiconductor chip.
1. A method for manufacturing a semiconductor device including a first semiconductor chip having first electrodes on a fringe region of a main surface thereof, and a second semiconductor chip smaller in area than the first semiconductor chip and having second electrodes on a main surface thereof, comprising:
a first step of preparing a first semiconductor wafer having a plurality of first semiconductor chips;
a second step of preparing a second semiconductor wafer having a plurality of second semiconductor chips;
a third step of cutting the second semiconductor wafer into the second semiconductor chips with a dicing blade while tapering ends of each second semiconductor chip in a forward direction;
a fourth step of connecting the first semiconductor wafer and the second semiconductor chips together by bonding a surface of each second semiconductor chip that is opposite to the main surface thereof to a region of the main surface of a corresponding first semiconductor chip of the first semiconductor wafer other than the fringe region;
a fifth step of forming a conductive film on the resultant first semiconductor wafer and patterning the conductive film to form wirings for connecting the first electrodes of each first scmiconductor chip to the second electrodes of a corresponding second semiconductor chip; and
a sixth step of cutting the resultant first semiconductor wafer into the first semiconductor chips as stacked-chip elements each having the first and second semiconductor chips stacked on each other.
2. The method according to claim 1 , wherein the third step includes the step of processing the ends of each second semiconductor chip so that a side surface of the second semiconductor chip forms an angle of 30 degrees to less than 90 degrees with respect to a rear surface thereof.
3. The method according to claim 1 , further comprising, between the second and third steps, the step of:
grinding the second semiconductor wafer from a side opposite to the main surface of each second semiconductor chip so that each second semiconductor chip has a thickness of 0.15 mm or less.
4. The method according to claim 1 , further comprising, between the fourth and fifth steps, the steps of:
forming an insulating layer that covers the fringe region of the main surface of each first semiconductor chip, a side surface of each second semiconductor chip, and the main surface of each second semiconductor chip; and
forming in the insulating layer first contact holes reaching the first electrodes of each first semiconductor chip and second contact holes reaching the second electrodes of each second semiconductor chip, wherein
the fifth step includes the step of forming the conductive film on the insulating layer so as to fill the first contact holes and the second contact holes.
5. The method according to claim 1 , wherein in the sixth step, the first semiconductor wafer is cut such that the side surface and the main surface of each first semiconductor chip form substantially a right angle.
6. The method according to claim 1 , wherein the wirings are formed along a side surface of the second semiconductor chip.