Digital power monitor and adaptive self-tuning power management
View Patent ↗A method and apparatus are provided for determining power events on an I/C chip for undissipated power to the chip, and wherein the chip includes a plurality of separately regulatable power consumers. A structure is provided for monitoring the occurrence of each power event to each power consumer, and determining the dissipation of power from each power event, and controlling power used by the chip responsive to the amount of undissipated power.
1. Apparatus for determining power events on an I/C chip for undissipated power to the chip having different components performing different functions at different locations on said chip, comprising said chip including a plurality of separately supplied and regulatable power consumers connected to different locations, wherein each power supplied constitutes a power event;
a structure for monitoring the occurrence and amount of power for each power event;
a structure for determining the dissipation of power from each power event operatively connected to each said monitoring structure; and
a structure to control power at a given power level above zero used by said chip for each power event at said apparatus responsive to the amount of undissipated power;
wherein the structure to control power at a given power level above zero used by the chip includes a structure to control power used at a plurality of operating levels individually at each monitoring structure.
2. The invention as defined in claim 1 wherein said structure to control power used by said chip includes a structure to control power used by at least one individual power consumer.
3. The invention as defined in claim 1 wherein said structure for determining the dissipation of power includes at least one counter.
4. The invention as defined in claim 1 wherein an additional level of control of power is to shut off operations in the chip completely.
5. The invention as defined in claim 1 wherein one level of power control is to reduce power used by at least one power consumer on said chip.
6. The invention as defined in claim 1 wherein a structure is provided to restore operations when the undissipated power reaches a given level.
7. The invention as defined in claim 1 wherein a structure is provided for a record of each power event.
8. The invention as defined in claim 1 wherein programming is provided to select the various levels of power controlled.
9. A method for determining power events on an I/C chip for undissipated power to a chip having different components performing different functions at different locations on said chip, and wherein the chip includes a plurality of separately supplied and regulatable power consumers connected to different locations, wherein each power supplied constitutes a power event, comprising the steps of:
monitoring the occurrence and amount of power for each power event to each power consumer;
determining the dissipation of power from each power event; and
controlling power at a given power level above zero to said chip for each power event at said apparatus responsive to the amount of undissipated power
wherein the power at a given power level above zero used by said chip is controlled individually to a plurality of operating levels to each consumer.
10. The invention as defined in claim 9 wherein at least one counter is provided to determine power dissipation.
11. The invention as defined in claim 9 wherein an additional level of control of power is to shut off operations in the chip completely.
12. The invention as defined in claim 9 wherein one level of power control is to reduce operations in at least one power consumer on said chip.
13. The invention as defined in claim 9 wherein operations are restored when the undissipated power reaches a given level.
14. The invention as defined in claim 9 wherein a record of each power event is maintained.
15. The invention as defined in claim 9 wherein programming is provided to select the various levels of power controlled.