Semiconductor device and method for writing data into semiconductor device
View Patent ↗A semiconductor device includes an array of memory cells, a reference circuit determining a reference level by using a reference cell, and a comparator circuit comparing data of the memory cells with the reference level, and the reference circuit comprising a circuit part that is connected to the reference cell and shifts the reference level. The circuit part includes a diode connected to a source of the reference cell and a switch transistor that is connected in parallel with the diode and is turned on/off. It is therefore possible to realize multiple threshold voltages with the use of one transistor for the reference cell, by shifting the threshold voltage of the reference cell.
1. A semiconductor device comprising:
an array of memory cells;
a reference circuit determining a reference level by using a reference cell; and
a comparator circuit comparing data of the memory cells with the reference level,
the reference circuit comprising a circuit part that is connected to the reference cell and shifts the reference level from a first reference level to a second reference level, wherein the circuit part includes a diode connected to a source of the reference cell, the circuit part further including a switch transistor that is connected in parallel with the diode and is turned on/off, further comprising a control circuit that controls the switch transistor, wherein the control circuit performs a verify operation on the memory cells by using reference levels produced by turning the switch transistor on/off.
2. The semiconductor device as claimed in claim 1 , further comprising a write circuit that writes data into the memory cells, wherein the write circuit uses different writing levels before and after the reference level is shifted.
3. The semiconductor device as claimed in claim 1 , wherein each of the memory cells has different threshold values.
4. The semiconductor device as claimed in claim 1 , wherein the memory cells include floating-gate type transistors.
5. The semiconductor device as claimed in claim 1 , wherein the semiconductor device is a semiconductor memory device.
6. A semiconductor device comprising:
an array of memory cells;
a reference circuit determining a reference level by using a reference cell; and
a comparator circuit comparing data of the memory cells with the reference level,
the reference circuit comprising a circuit part that is connected to the reference cell and shifts the reference level from a first reference level to a second reference level, wherein the circuit part includes a diode connected to a source of the reference cell, the circuit part further including a switch transistor that is connected in parallel with the diode and is turned on/off, further comprising a control circuit that controls the switch transistor, wherein the control circuit checks levels of the memory cells using reference levels obtained by turning the switch transistor on/off.
7. The semiconductor device as claimed in claim 6 , wherein the control circuit checks the levels of the memory cells using reference levels obtained by turning the switch transistor on/off when the semiconductor device is activated.
8. A method of writing data in a memory cell comprising the steps of:
changing a reference level by controlling an on/off operation on a transistor connected in parallel with a diode, the diode connected in series with a reference cell; and
writing data into the memory cell with different reference levels before and after the reference level is changed.