IP Library Granted Patent US 7,291,534
Granted Patent B2
US 7,291,534 · App. 11/276,731 · Granted Nov 6, 2007

Method of manufacturing semiconductor device

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Quick Facts
Patent No.
US 7,291,534
App. No.
11/276,731
Granted
Nov 6, 2007
Kind
B2
Abstract

A method of manufacturing a semiconductor device has the steps of: preparing a semiconductor substrate having a structure in which first and second active regions are isolated by a field oxide; forming a first insulation film and a first film on the semiconductor substrate; exposing the first active region in the first active region; forming a second insulation film and a first conductive film over the first active region, the second insulation film being thicker than the first insulation film; processing the first conductive film and the second insulation film into a first gate electrode and a first gate insulation film; exposing the second active region in the second active region; forming a third insulation film and a second conductive film on the over the second active region, the third insulation film being thinner than the second insulation film; and processing the second conductive film and the third insulation film into a second gate electrode and a second gate insulation film.

Claims (47)

1. A method of manufacturing a semiconductor device, comprising:

(a) preparing a semiconductor substrate having a structure in which first and second active regions are isolated by an element isolating insulation film;

(b) forming a first insulation film on the semiconductor substrate, the first insulation film covering the first and second active regions and the element isolating insulation film;

(c) forming a first film on the first insulation film;

(d) exposing the first active region by etching the first insulation film and the first film over the first active region;

(e) forming a second insulation film which is thicker than the first insulation film on the exposed first active region;

(f) forming a first conductive film on the second insulation film;

(g) forming a first gate electrode and a first gate insulation film over the first active region by processing the first conductive film and the second insulation film;

(h) exposing the second active region by etching the first insulation film and the first film over the second active region;

(i) forming a third insulation film which is thinner than the second insulation film on the exposed second active region;

(j) forming a second conductive film on the third insulation film; and

(k) forming a second gate electrode and a second gate insulation film over the second active region by processing the second conductive film and the third insulation film.

2. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming sidewall spacers on the sides of the first and second gate electrodes, respectively.

3. The method of manufacturing a semiconductor device according to claim 1 , wherein

the second and third insulation films are oxide films formed by thermal oxidation treatments.

4. The method of manufacturing a semiconductor device according to claim 1 , wherein

an etching rate of the first film under predetermined conditions differs from an etching rate of the first insulation film under the predetermined conditions.

5. The method of manufacturing a semiconductor device according to claim 1 , wherein

the first insulation film is an oxide film, and the first film is a nitride film.

6. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a second film on the first film.

7. The method of manufacturing a semiconductor device according to claim 6 , wherein

an etching rate of the second film under predetermined conditions differs from an etching rate of the first film under the predetermined conditions.

8. The method of manufacturing a semiconductor device according to claim 6 , wherein

the first film is a nitride film, and

the second film is an oxide film.

9. The method of manufacturing a semiconductor device according to claim 1 , further comprising:

forming a fourth insulation film covering the first gate electrode and the first gate insulation film.

10. The method of manufacturing a semiconductor device according to claim 9 , wherein

an etching rate of the fourth insulation film under predetermined conditions differs from an etching rate of the first film under the predetermined conditions.

11. The method of manufacturing a semiconductor device according to claim 9 , wherein

the first film is a nitride film, and

the fourth insulation film is an oxide film.

12. The method of manufacturing a semiconductor device according to claim 5 , wherein

the first insulation film is removed using a fluorinated acid liquid, and

the first film is removed using a thermal phosphoric acid liquid.

13. The method of manufacturing a semiconductor device according to claim 8 , wherein

the first film is removed using a thermal phosphoric acid liquid, and

the second film is removed using a fluorinated acid liquid.

14. The method of manufacturing a semiconductor device according to claim 11 , wherein

the first film is removed using a thermal phosphoric acid liquid.

15. The method of manufacturing a semiconductor device according to claim 1 , wherein step (c) is performed after step (b) and step (d) is performed after step (c).

16. The method of manufacturing a semiconductor device according to claim 15 , wherein step (e) is performed after step (d), step (f) is performed after step (e), and step (g) is performed after step (f).

17. The method of manufacturing a semiconductor device according to claim 16 , wherein step (h) is performed after step (g), step (i) is performed after step (h), step (j) is performed after step (i), and step (k) is performed after step (j).

18. The method of manufacturing a semiconductor device according to claim 1 , wherein step (e) is performed after step (d), step (f) is performed after step (e), and step (g) is performed after step (f).

19. The method of manufacturing a semiconductor device according to claim 18 , wherein step (h) is performed after step (g), step (i) is performed after step (h), step (j) is performed after step (i), and step (k) is performed after step (j).

Assignments (3)
CHANGE OF NAME Recorded Mar 21, 2014
From: OKI SEMICONDUCTOR CO., LTD
To: LAPIS SEMICONDUCTOR CO., LTD.
Reel/Frame 032495/0483 →
CHANGE OF NAME Recorded Jan 8, 2009
From: OKI ELECTRIC INDUSTRY CO., LTD.
To: OKI SEMICONDUCTOR CO., LTD.
Reel/Frame 022092/0903 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2006
From: TOMITA, NORIKO
To: OKI ELECTRIC INDUSTRY CO., LTD.
Reel/Frame 017357/0214 →