Granted Patent B2

US 7,733,995 · App. 11/305,088 · Granted Jun 8, 2010

Assignee: Fujitsu Semiconductor Limited

Abstract

Claims (32)

1. An {N−1}-stage noise filter, used for a digital signal, comprising:

an N number of flip flops connected in series;

at least an {N−1} number of AND circuits configured such that outputs from a first and a second of the flip flops are input to a first of the AND circuits, and for each n of 2≦n≦N−1, an output from an {n+1}-th of the flip flops and an output from an {n−1}-th of the AND circuits are input to an n-th of the AND circuits in order for each n-th AND circuit for 1≦n≦N−1 to be configured to output, as an output of an n-th stage filter in the noise filter, an AND of outputs of the first to {n+1}-th flip flops;

a selection unit to output a filter output signal by selecting one of the outputs from the first to {N−1}-th AND circuits based on a selection signal;

a wave form check unit to make the selection unit change a selection thereby by changing a value of the selection signal based on a pulse width on the filter output signal which is output from the selection unit; and

a minimum pulse width designation register to set a minimum width of a pulse of said filter output signal, wherein

said wave form check unit comprises,

an output pulse width counter to count synchronously with an internal clock for a period of time when the filter output signal is high and to output a counted value;

a comparison unit to compare an added value that is the counted value added by a filter value, which is determined by said selection signal, with a set value of said minimum pulse width designation register; and

a filter output changeover counter to change the selection signal once the added value is less than the set value of the minimum pulse width designation register as a result of the comparison by the aforementioned comparison unit.

2. The noise filter according to claim 1 , further comprising;

a filter value optimization complete flag to measure a certain time and being set once optimizing said {N−1} number of stages of filters is complete after the certain time elapses.

3. The noise filter according to claim 1 , wherein

said wave form check unit to change the value of said selection signal so that said selection unit changes the value of the selection signal to a signal filtered by a filter with a higher number of stages.

4. An {N−1}-stage noise filter, used for a digital signal, comprising:

an N number of flip flops connected in series;

at least an {N−1}number of AND means configured such that outputs from a first and a second of the flip flops are input to a first of the AND means, and for each n of 2≦n≦N−1 an output from an {n+1}-th of the flip flops and an output from an {n−1}-th of the AND means are input to an n-th of the AND means in order for each n-th AND means for 1≦n≦N−1 to be configured to output, as an output of an n-th stage filter means in the noise filter, an AND of outputs of the first to {n+1}-th flip flops;

selection means for outputting a filter output signal by selecting one of the outputs from the first to {N−1}-th AND means based on a selection signal;

wave form check means for making the selection means change a selection thereby by changing a value of the selection signal based on a pulse width on the filter output signal which is output from the selection means; and

a minimum pulse width designation register for setting a minimum width of a pulse of said filter output signal, wherein

said wave form check means comprises,

an output pulse width counter for counting synchronously with an internal clock for a period of time when the filter output signal is high and outputting a counted value;

a comparison means for comparing an added value that the counted value, added by a filter value, which is determined by said selection signal, with a set value of said minimum pulse width designation register; and

a filter output changeover counter for changing the selection signal once the added value is less than the set value of the minimum pulse width designation register as a result of the comparison by the aforementioned comparison means.

5. A noise filtering method by an {N−1}-stage noise filter, used for a digital signal, comprising:

inputting, to a first of at least an {N−1} number of AND circuits, outputs from a first and a second of an N number of flip flops connected in series;

for each n of 2≦n≦N−1, inputting an output from an {n+1}-th of the flip flops and an output from an {n−1}-th of the AND circuits to an n-th of the AND circuits;

outputting a filter output signal by selecting, based on a selection signal, one of the outputs from the first to {N−1}-th AND circuits where each output from each n-th AND circuit for 1≦n≦N−1 represents an AND of outputs of the first to {n+1}-th flip flops; and

changing a value of the selection signal based on a pulse width on the filter output signal, wherein the changing includes,

counting synchronously with an internal clock for a period of time when the filter output signal is high and outputting a counted value;

comparing an added value that the counted value, added by a filter value, which is determined by said selection signal, with a set value of a minimum width of the pulse of said filter output signal; and

changing the selection signal once the added value is less than the set value as a result of the comparison.

Assignments (10)

Priority Claims (1)

Continuity (1)