IP Library Granted Patent US 8,890,638
Granted Patent B2
US 8,890,638 · App. 11/437,059 · Granted Nov 18, 2014

Stub-tuned wirebond package

Inventor: Prashant Singh (Eden Prairie, MN)
Assignee: LSI Corporation
H05K1/025H03H7/38H01L23/66H01L24/45H01L24/49H01L2223/6611H01L2224/05553H01L2224/45144H01L2224/48H01L2224/49171H01L2924/01005H01L2924/01014H01L2924/01027H01L2924/01079H01L2924/14H01L2924/19041H01L2924/19042H01L2924/19043H01L2924/30105H01L2924/30107H01L2924/3011H01P5/02H05K2201/09236H05K2201/09727H05K2201/09781H05K2203/049H01L24/48H01L2924/01006H01L2924/01033H01L2224/48599
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Quick Facts
Patent No.
US 8,890,638
App. No.
11/437,059
Granted
Nov 18, 2014
Kind
B2
Abstract

An apparatus, system and method are described for impedance matching between a semiconductor package and a load on a board. In one embodiment of the present invention, a package trace is provided with an array of stubs that is designed to provide capacitance to the trace in order to more effectively match a wirebond. This improved match results in improvements in return loss, especially in higher speed applications such as broadband. Design parameters such as the width and length of each stub, and the spacing between the stubs may be varied depending on the impedance requirements of the trace.

Claims (17)

1. A system for electrically coupling a driver package to a load, said system comprising:

a pad that provides an electrical bonding location on said driver package;

a bondwire, coupled to said pad, that communicates an electrical signal from said driver package, said bondwire causing inductive effects to said electrical signal; and

a trace, coupled to said bondwire, that communicates said electrical signal to a load and comprises a plurality of tuning stubs, said plurality of tuning stubs being designed to match a first impedance of said trace to a second impedance of said driver package and said bondwire such that said tuning stub design particularly compensates for said inductive effects caused by said bondwire.

2. The system of claim 1 wherein at least two tuning stubs within the plurality of tuning stubs have different widths.

3. The system of claim 2 wherein the width of the tuning stubs within the plurality of tuning stubs decreases relative to a distance of each of the tuning stubs from the bondwire.

4. The system of claim 2 wherein the width of the tuning stubs within the plurality of tuning stubs increases relative to a distance of each of the tuning stubs from the bondwire.

5. The system of claim 1 wherein said system is a broadband system.

6. The system of claim 1 wherein said system is a storage system implementing a Fibre Channel protocol.

7. The system of claim 1 wherein said tuning stubs are designed to provide a particular capacitance on said trace over a particular band of frequencies in relation to said second impedance of said driver package and said bondwire in order to compensate for said inductive effects caused by said bondwire.

8. A method for impedance matching within a wirebond package environment, said method comprising:

coupling a pad on a semiconductor package to a bondwire;

coupling said bondwire to a trace having a plurality of impedance tuned stubs; and

designing said plurality of impedance tuned stubs to provide an impedance transformation from said bondwire to a load in order to compensate for inductive effects caused by said bondwire.

9. The method of claim 8 wherein the widths of the impedance tuned stubs within the plurality of tuning stubs increases in relation to a distance from a tuning stub to the bondwire.

10. The method of claim 8 wherein a second trace having a second plurality of impedance tuned stubs provides a differential signal transmission line between the semiconductor package and the load.

11. The method of claim 8 wherein said impedance transformation effectively cancels a majority of inductance caused by said bondwire.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE OF THE MERGER PREVIOUSLY RECORDED ON REEL 047642 FRAME 0417. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT, Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048521/0395 →
MERGER Recorded Oct 5, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047642/0417 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 18, 2006
From: SINGH, PRASHANT
To: LSI LOGIC CORPORATION
Reel/Frame 017902/0518 →
Continuity (1)
Related Publication 20070268088A1 · Nov 22, 2007