Support method for designing a semiconductor device

1. A support method of designing a semiconductor device, comprising:

arranging at least three wiring lines in parallel in a wiring line layer to transfer a same signal, wherein the wiring lines are positioned equidistant apart;

setting a wiring line inhibition area in said wiring line layer to cover a space between said wiring lines and to inhibit arrangement of another wiring line other than said wiring lines, wherein said arranging step and said setting step respectively produce split wiring line layout data and inhibition area position data;

completing a design layout for a semiconductor device using said split wiring line layout data and said inhibition area position data; and

storing the design layout in a physical storage unit.

2. The support method according to claim 1 , further comprising:

arranging said another wiring line in an area of said wiring line layer other than said wiring line inhibition area.

3. The support method according to claim 2 , wherein a wiring line width and a wiring line interval between said wiring lines are wider than those of said another wiring line.

4. The support method according to claim 1 , wherein said setting comprises:

setting said wiring line inhibition area to cover areas outside said wiring lines in addition to said spaces between said wiring lines.

5. The support method according to claim 4 , wherein said wiring line inhibition area outside said wiring lines contacts a leftmost wiring line or a rightmost wiring line and said outer area has a same width as said space between said plurality of wiring lines.

6. The support method of designing a semiconductor device according to claim 5 , wherein said wiring line inhibition area outside said wiring lines contacts the leftmost wiring line and the rightmost wiring line and the outer areas have the same width as said space between said plurality of wiring lines.

7. The support method according to claim 1 , wherein said setting comprises:

setting said wiring line inhibition area to cover at least a part of said wiring lines in addition to said space between said plurality of wiring lines.

8. The support method according to claim 7 , wherein said setting comprises:

setting said wiring line inhibition area as a rectangular area to cover all of said wiring lines.

9. The method of claim 1 , further comprising the step of manufacturing a reticle from said stored design layout.

10. The method of claim 1 , wherein the physical storage unit is a computer hard disk drive.

11. A support method of designing a semiconductor device, comprising:

arranging at least three wiring lines in parallel and equidistant apart in a wiring line layer to transfer a same signal;

setting a wiring line inhibition area in said wiring line layer based on position data of said wiring lines to inhibit arrangement of another wiring line in a portion of said wiring line layer related to said wiring lines, wherein said arranging step and said setting step respectively produce split wiring line layout data and inhibition area position data;

completing a design layout for the semiconductor device using said split wiring line layout data and said inhibition area position data; and

storing the design lay out in a physical storage unit.

12. The support method according to claim 11 , wherein said wiring line inhibition area is set to cover a space between said wiring lines in said wiring line layer.

13. The support method according to claim 11 , further comprising:

arranging said another wiring line in said wiring line layer.

14. The support method according to claim 11 , wherein said wiring line inhibition area overlaps at least a portion of said wiring lines in said wiring line layer.

15. The support method according to claim 14 , wherein said wiring line inhibition area completely overlaps said wiring lines in said wiring line layer.

16. The method of claim 11 , further comprising the step of manufacturing a reticle from said stored design layout.

17. The method of claim 11 , wherein the physical storage unit is a computer hard disk drive.

18. A support method of designing a semiconductor device, comprising:

arranging a plurality of wiring lines in parallel in a wiring line layer to transfer a same signal; and

setting a wiring line inhibition area in said wiring line layer to cover a space between said plurality of wiring lines and to inhibit arrangement of another wiring line other than said plurality of wiring lines;

setting said wiring line inhibition area to cover areas outside said plurality of wiring lines in addition to said spaces between said plurality of wiring lines,

wherein said wiring line inhibition area outside said plurality of wiring lines contacts a leftmost wiring line or a rightmost wiring line and said outer area has a same width as said space between said plurality of wiring lines;

completing a design layout for a semiconductor device using said set wiring line inhibition area; and

storing the design layout in a physical storage unit.

19. The support method of designing a semiconductor device according to claim 18 , wherein said wiring line inhibition area outside said wiring lines contacts the leftmost wiring line and the rightmost wiring line and the outer areas have the same width as said space between said plurality of wiring lines.

20. The method of claim 18 , further comprising the step of manufacturing a reticle from said stored design layout.