IP Library Granted Patent US 7,989,328
Granted Patent B2
US 7,989,328 · App. 11/641,646 · Granted Aug 2, 2011

Resistive memory array using P-I-N diode select device and methods of fabrication thereof

Assignee: Spansion LLC
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,989,328
App. No.
11/641,646
Granted
Aug 2, 2011
Kind
B2
Abstract

An electronic structure includes a resistive memory device, and a P-I-N diode in operative association with the resistive memory device. A plurality of such electronic structures are used in a resistive memory array, with the P-I-N diodes functioning as select devices in the array. Methods are provided for fabricating such resistive memory device-P-I-N diode structures.

Claims (38)

1. A method of forming regions of a P-I-N diode comprising:

providing a semiconductor body;

providing first and second doped bodies adjacent and running along opposite sides of the semiconductor body, the first and second doped bodies containing a dopant of a first selected conductivity type;

providing a third doped body overlying the semiconductor body, the third doped body containing a dopant of a second selected conductivity type opposite the first selected conductivity type;

diffusing dopant of the first selected conductivity type from the first and second doped bodies into the semiconductor body to form a first region of the first selected conductivity type in the semiconductor body, the first region of the first selected conductivity type in the semiconductor body making up part of a P-I-N diode;

diffusing dopant of the second selected conductivity type from the third doped body into the semiconductor body to form a region of the second selected conductivity type in the semiconductor body, the region of the second selected conductivity type in the semiconductor body making up part of a P-I-N diode; and

diffusing dopant of the first selected conductivity type from the first and second doped bodies into the semiconductor body to form the first region and a second region of the first selected conductivity type in the semiconductor body, the second region making up part of a P-I-N diode.

2. The method of claim 1 wherein the first region of the first selected conductivity type and the region of the second selected conductivity type are formed at different times in the semiconductor body.

3. The method of claim 1 wherein an intrinsic region is provided between the first region of the first selected conductivity type and the region of the second selected conductivity type.

4. The method of claim 1 wherein the semiconductor body comprises monocrystalline material.

5. The method of claim 4 wherein the semiconductor body comprises epitaxial material.

6. The method of claim 1 and further comprising providing a conductor in contact with the first region of the selected conductivity type in the semiconductor body making up part of a P-I-N diode.

7. The method of claim 6 wherein the conductor is a silicide.

8. The method of claim 1 and further comprising:

providing a second semiconductor body, the second doped body and a third doped body being adjacent the second semiconductor body, wherein the second and third doped bodies run along opposite sides of the second semiconductor body; and

diffusing dopant of the first selected conductivity type from the second and third doped bodies into the second semiconductor body to form a first region of the first selected conductivity type in the second semiconductor body, the first region of the first selected conductivity type in the second semiconductor body making up part of a P-I-N diode.

9. The method of claim 8 wherein the second semiconductor body comprises monocrystalline material.

10. The method of claim 9 wherein the second semiconductor body comprises epitaxial material.

11. The method of claim 8 and further comprising

providing a conductor in contact with a region of the first selected conductivity type in the second semiconductor body making up part of a P-I-N diode.

12. The method of claim 11 wherein the conductor is a silicide.

13. The method of claim 1 wherein an intrinsic region is provided between the first and second regions of the first selected conductivity type.

14. The method of claim 13 wherein the first and second regions of the first selected conductivity type are formed simultaneously in the semiconductor body.

15. The method of claim 13 wherein the semiconductor body comprises monocrystalline material.

16. The method of claim 15 wherein the semiconductor body comprises epitaxial material.

17. The method of claim 1 and further comprising providing a conductor in contact with a region of the first selected conductivity type in the semiconductor body making up part of a P-I-N diode.

18. The method of claim 17 wherein the conductor is a silicide.

19. The method of claim 1 and further comprising forming a resistive memory device associated with the resulting structure.

20. The method of claim 19 wherein the resistive memory device comprises a first electrode, an insulating layer on and in contact with the first electrode, and a second electrode on and in contact with the insulating layer.

21. The method of claim 1 and further comprising said P-I-N diode incorporated in a system.

22. The method of claim 21 wherein the system is selected from the group consisting of a hand-held device, a vehicle, and a computer.

23. A method of forming a P-I-N diode comprising:

providing a first and second semiconductor body;

providing first and second doped bodies adjacent the first semiconductor body and a third doped body and the second doped body adjacent the second semiconductor body, the first, second, and third doped bodies containing a dopant of a first selected conductivity type, wherein the first and second doped bodies run along opposite sides of the first semiconductor body, and wherein the second and third doped bodies run along opposite sides of the second semiconductor body; and

diffusing dopant of the first selected conductivity type from the first and second doped bodies and the second and third doped bodies into the first and second semiconductor bodies, respectively, to form a region of the first selected conductivity type in the first and second semiconductor bodies, the regions of the first selected conductivity type in the first and second semiconductor bodies each making up part of a P-I-N diode.

24. The method of claim 23 , further comprising:

providing a third doped body overlying the first semiconductor body and a fourth doped body overlying the second semiconductor body, the third and fourth doped bodies each containing a dopant of a second selected conductivity type opposite the first selected conductivity type; and

diffusing dopant of the second selected conductivity type from the third and fourth doped bodies into the first and second semiconductor bodies, respectively, to form a region of the second selected conductivity type in the first and second semiconductor bodies, the regions of the second selected conductivity type in the first and second semiconductor bodies each making up part of a P-I-N diode.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 25, 2016
From: CHOI, SEUNGMOO; HADDAD, SAMEER
To: SPANSION LLC
Reel/Frame 039538/0445 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036050/0337 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 19, 2006
From: CHOI, SEUNGMOO; HADDAD, SAMEER
To: SPANSION LLC
Reel/Frame 018703/0583 →
Continuity (1)
Related Publication 20080144354A1 · Jun 19, 2008