IP Library Granted Patent US 8,387,019
Granted Patent B1
US 8,387,019 · App. 11/707,178 · Granted Feb 26, 2013

Graphical user assignable register map

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Quick Facts
Patent No.
US 8,387,019
App. No.
11/707,178
Granted
Feb 26, 2013
Kind
B1
Abstract

A design tool provides a graphical user assignable register map. The design tool graphically displays a register map that indicates locations of system variables in a memory of a processing device for an embedded application. The design tool further provides a user interface element for a user to arrange an order of the system variables in the register map.

Claims (40)

1. A computer implemented method, comprising:

graphically displaying, by a processor, a register map that indicates locations of system variables in a memory of a processing device for an embedded application and indicates whether the system variables are read-only or readable-and-writeable;

providing a user interface element for a user to arrange an order of the system variables in the register map; and

receiving a user input that selects one of the system variables and a directional indicator to move the selected system variable in the register map.

2. The method of claim 1 , further comprising:

providing a communication interface to the processing device to allow access to values of the system variables in the order indicated by the register map.

3. The method of claim 1 , wherein graphically displaying the register map further comprises:

displaying the system variables having the same read attribute and the same write attribute in a list box.

4. The method of claim 1 , wherein displaying the system variables further comprises:

displaying readable-and-writable system variables in a first list box and read-only system variables in a second list box.

5. The method of claim 3 , further comprising:

maintaining a schema that includes a size, an offset, and an ordinal for each of the system variables.

6. The method of claim 1 , further comprising:

providing a promote button to move a selected system variable above a current position in the register map; and

providing a demote button to move the selected system variable below a current position in the register map.

7. A design tool comprising:

a processor;

a register map manager, executable by the processor, to allocate a memory of a processing device to system variables of an embedded application; and

a graphical user interface (GUI) application, executable by the processor and coupled to the register map manager, the GUI application configured to render a register map that indicates locations of the system variables in a memory of the processing device and indicates whether the system variables are read-only or readable-and-writeable, the GUI application further configured to allow a user to arrange an order of the system variables in the register map, and wherein the GUI further comprises a directional indicator configured to allow movement of a selected system variable in the register map.

8. The design tool of claim 7 , further comprising:

a communication interface to the processing device to allow access to values of the system variables in the order indicated by the register map.

9. The design tool of claim 7 , further comprising:

a register map file that includes a size, an offset, and an ordinal for each of the system variables.

10. The design tool of claim 7 , wherein the GUI further comprises:

at least two list boxes, each list box configured to display the system variables that have the same read attribute and the same write attribute.

11. The design tool of claim 7 , wherein the directional indicator to move the selected system variable above a current position in the register map and a demote button to move the selected system variable below the current position in the register map.

12. An article of manufacture comprising:

a non-transitory machine-readable medium including a plurality of instructions which when executed by a processor, cause the processor to perform a method comprising:

graphically displaying, by the processor, a register map that indicates locations of system variables in a memory of a processing device for an embedded application and indicates whether the system variables are read-only or readable-and-writeable;

providing a user interface element for a user to arrange an order of the system variables in the register map;

receiving a user input that selects one of the system variables and a directional indicator to move the selected system variable in the register map.

13. The article of manufacture of claim 12 , wherein the method further comprises:

providing a communication interface to the processing device to allow access to values of the system variables in the order indicated by the register map.

14. The article of manufacture of claim 12 , wherein the method of graphically displaying the register map further comprises:

displaying the system variables having the same read attribute and the same write attribute in a list box.

15. The article of manufacture of claim 12 , wherein the method of displaying the system variables further comprises:

displaying readable-and-writable system variables in a first list box and read-only system variables in a second list box.

16. The article of manufacture of claim 14 , wherein the method further comprises:

maintaining a schema that includes a size, an offset, and an ordinal for each of the system variables.

17. The article of manufacture of claim 14 , wherein the method further comprises: providing a promote button to move a selected system variable above a current position in the register map; and providing a demote button to move the selected system variable below a current position in the register map.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded Dec 22, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 044949/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 044938/0360 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2007
From: OGAMI, KENNETH Y.; ANDERSON, DOUG
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 018966/0410 →