IP Library Granted Patent US 7,755,203
Granted Patent B2
US 7,755,203 · App. 11/708,027 · Granted Jul 13, 2010

Circuit substrate and semiconductor device

Assignee: Fujitsu Semiconductor Limited
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,755,203
App. No.
11/708,027
Granted
Jul 13, 2010
Kind
B2
Abstract

A circuit substrate for improving the reliability and productivity of a semiconductor device, and that semiconductor device. In a circuit substrate to which a semiconductor element is to be flip-chip mounted, at least one island-shaped electrically conductive layer is selectively disposed together with a wiring layer at an element mounting area where the semiconductor element is to be mounted, and an insulating resin layer is disposed over the island-shaped electrically conductive layer. The semiconductor element is secured at the element mounting area to the circuit substrate by an adhesion material to make a semiconductor device. With this, delaminating of the wiring layer inside the semiconductor device is suppressed, and the damage of an electrode is suppressed. The circuit substrate has high reliability and the semiconductor device, having the circuit substrate, is implemented.

Claims (23)

1. A circuit substrate over which a semiconductor element is flip-chip mounted, comprising:

a wiring layer disposed in an area opposite a surface of the semiconductor element where an electrode of the semiconductor element is disposed;

an electrically conductive layer disposed apart from the wiring layer in the area; and

a resin layer disposed over the electrically conductive layer;

wherein the height from a surface of a base member, constituting the circuit substrate, to a surface of the resin layer, is lower than the height of solder resist disposed at a perimeter portion of the area.

2. The circuit substrate according to claim 1 , wherein the resin layer is disposed only over the electrically conductive layer.

3. The circuit substrate according to claim 1 , wherein the electrically conductive layer is made from copper (Cu), and two metal layers of a nickel (Ni) layer and a gold (Au) layer are formed in that order from the lower layer over a surface of the electrically conductive layer.

4. The circuit substrate according to claim 1 , wherein the resin layer, disposed over the electrically conductive layer, also covers a side face of the electrically conductive layer.

5. The circuit substrate according to claim 1 , wherein the resin layer, disposed over the electrically conductive layer, is divided into a plurality of pieces and disposed.

6. The circuit substrate according to claim 1 , wherein the resin layer, disposed over the electrically conductive layer, is formed to have a smaller area than the electrically conductive layer so as to expose an upper edge surface of the electrically conductive layer.

7. The circuit substrate according to claim 6 , wherein a width of the upper edge surface exposed is the same as a width of a wire of the wiring layer.

8. A semiconductor device comprising:

a semiconductor element;

a circuit substrate over which the semiconductor element is flip-chip mounted, comprising a wiring layer disposed in an area opposite a surface of the semiconductor element where an electrode of the semiconductor element is disposed, an electrically conductive layer disposed apart from the wiring layer in the area, and a resin layer disposed over the electrically conductive layer; and

an adhesion material disposed between the circuit substrate and the semiconductor element; wherein

the height from a surface of a base member, constituting the circuit substrate, to a surface of the resin layer, is lower than the height of solder resist disposed at a perimeter portion of the area.

9. The semiconductor device according to claim 8 , wherein the resin layer is disposed only over the electrically conductive layer.

10. The semiconductor device according to claim 8 , wherein the electrically conductive layer is made from copper (Cu), and two metal layers of a nickel (Ni) layer and a gold (Au) layer are formed in that order from the lower layer over a surface of the electrically conductive layer.

11. The semiconductor device according to claim 8 , wherein the resin layer, disposed over the electrically conductive layer, also covers a side face of the electrically conductive layer.

12. The semiconductor device according to claim 8 , wherein the resin layer, disposed over the electrically conductive layer, is divided into a plurality of pieces and disposed.

13. The semiconductor device according to claim 8 , wherein the resin layer, disposed over the electrically conductive layer, is formed to have a smaller area than the electrically conductive layer so as to expose an upper edge surface of the electrically conductive layer.

14. The semiconductor device according to claim 13 , wherein a width of the upper edge surface exposed is the same as a width of a wire of the wiring layer.

15. The semiconductor device according to claim 8 , wherein the electrically conductive layer has a ground potential.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0637 →
CHANGE OF NAME Recorded Jul 9, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024651/0744 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 9, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021976/0089 →
Priority Claims (1)
JP 2006-222825 · Aug 18, 2006 · national
Continuity (1)
Related Publication 20080042300A1 · Feb 21, 2008