Transistor with spatially integrated schottky diode
View Patent ↗An integrated circuit device for delivering power to a load includes a composite transistor and a composite schottky diode. The composite transistor is formed by a plurality of component transistors that have commonly coupled source terminals, commonly coupled drain terminals and commonly coupled gate terminals. The composite schottky diode is formed by a plurality of component schottky diodes that have anodes coupled in common and coupled to the source terminals of the plurality of component transistors, and for which drain terminals of the commonly coupled drain terminals constitute respective cathodes.
1. A power-delivery integrated circuit device comprising:
a composite transistor formed by a plurality of component transistors, arranged in parallel, that have commonly coupled source terminals, commonly coupled drain terminals and commonly coupled gate terminals; and
a composite schottky diode formed by a plurality of component schottky diodes, arranged in parallel, that have anodes coupled in common and coupled to the source terminals of the plurality of components transistors, and for which drain terminals of the commonly coupled drain terminals constitute respective cathodes,
wherein the composite schottky diode is coupled between a source and a drain of a bypass transistor within power-stage circuitry of the power-delivery integrated circuit device.
2. The integrated circuit device of claim 1 wherein the plurality of component transistors and the plurality of component schottky diodes comprise a high-voltage N-type well disposed within a P-type semiconductor substrate.
3. The integrated circuit device of claim 1 wherein the composite transistor comprises a laterally-diffused metal-oxide-semiconductor transistor.
4. The integrated circuit device of claim 1 wherein the plurality of component transistors are disposed in an array that includes rows and columns of the component transistors.
5. The integrated circuit device of claim 1 wherein the plurality of component schottky diodes are disposed within the array of component transistors.
6. The integrated circuit device of claim 1 wherein the commonly coupled gate terminals comprise polysilicon structures that are disposed on a semiconductor substrate and wherein the plurality of component schottky diodes comprise metal features disposed on the semiconductor substrate between respective pairs of the polysilicon structures.
7. The integrated circuit device of claim 1 wherein the plurality of component schottky diodes comprise metal features disposed on a semiconductor substrate, each of the metal features constituting the anodes of at least two of the component schottky diodes.
8. The integrated circuit device of claim 1 wherein the anodes of the plurality of component schottky diodes and the source terminals of the plurality of component transistors are coupled to a ground reference node.
9. A method comprising:
switching on a first plurality of component transistors during a first interval, each of the component transistors being coupled in parallel to provide a path for a current to flow to a load element; and
switching off the first plurality of component transistors during a second interval to avoid establishing a path to ground through the first plurality of component transistors, the path for the current to flow to the load element being established through a plurality of component schottky diodes that are coupled, in parallel, anode-to-cathode between source terminals and drain terminals, respectively, of the plurality of component transistors,
wherein the plurality of component schottky diodes are coupled between a source and a drain of a bypass transistor within power-stage circuitry of a power-delivery integrated circuit device.
10. The method of claim 9 further comprising receiving a control signal that includes a first pulse, switching on a second plurality of component transistors for the duration of the first pulse, switching off the second plurality of component transistors at the conclusion of the first pulse, delaying for the third interval after switching off the second plurality of component transistors, and wherein switching on a first plurality of component transistors during a first interval comprises switching on the first plurality of component transistors after delaying for the third interval.
11. The method of claim 9 wherein the second interval precedes a second pulse in the control signal, the method further comprising switching on the second plurality of component transistors for the duration of the second pulse.
12. An integrated-circuit (IC) power delivery system comprising a plurality of integrated circuit devices, each of the integrated circuit devices including:
a composite transistor formed by a plurality of component transistors, arranged in parallel, that have commonly coupled source terminals, commonly coupled drain terminals and commonly coupled gate terminals; and
a composite schottky diode formed by a plurality of component schottky diodes, arranged in parallel, that have anodes coupled in common and coupled to the source terminals of the plurality of component transistors, and for which drain terminals of the commonly coupled drain terminals constitute respective cathodes,
wherein the composite schottky diode is coupled between a source and a drain of a bypass transistor within power-stage circuitry of the power-delivery integrated circuit device.
13. The IC power delivery system of claim 12 wherein the plurality of component transistors and the plurality of component schottky diodes comprise a high-voltage N-type well disposed within the P-type semiconductor substrate.
14. The IC power delivery system of claim 12 wherein the plurality of component transistors are disposed in an array that includes rows and columns of the component transistors.
15. The IC power delivery system of claim 14 wherein the plurality of component schottky diodes are disposed within the array of component transistors.
16. An integrated circuit device comprising:
means for switching on a first plurality of component transistors during a first interval, each of the component transistors being coupled in parallel to provide a path for a current to flow to a load element; and
means for switching off the first plurality of component transistors during a second interval to avoid establishing a path to ground through the first plurality of component transistors, the path for the current to flow to the load element being established through a plurality of component schottky diodes that are coupled, in parallel, anode-to-cathode between source terminals and drain terminals, respectively, of the plurality of component transistors,
wherein the plurality of component schottky diodes are coupled between a source and a drain of a bypass transistor within power-stage circuitry of a power-delivery integrated circuit device.
17. The integrated circuit device of claim 16 further comprising means for receiving a control signal that includes a first pulse, means for switching on a second plurality of component transistors for the duration of the first pulse, means for switching off the second plurality of component transistors at the conclusion of the first pulse, means for delaying for the third interval after switching off the second plurality of component transistors, and wherein the means for switching on a first plurality of component transistors during a first interval comprises means for switching on the first plurality of component transistors after delaying for the third interval.
18. Computer-readable media having information embodied therein that includes a description of an integrated circuit device for delivering power to a load, the information including descriptions of:
a composite transistor formed by a plurality of component transistors, arranged in parallel, that have commonly coupled source terminals, commonly coupled drain terminals and commonly coupled gate terminals; and
a composite schottky diode formed by a plurality of component schottky diodes, arranged in parallel, that have anodes coupled in common and coupled to the source terminals of the plurality of components transistors, and for which drain terminals of the commonly coupled drain terminals constitute respective cathodes,
wherein the composite schottky diode is coupled between a source and a drain of a bypass transistor within power-stage circuitry of the power-delivery integrated circuit device.