Exception-based timer control
View Patent ↗A processing device includes a timer and an exception controller configured to provide an exception indicator representative of a first exception. The processing device further includes a timer controller configured to selectively enable/disable the timer in response to the exception and based on a characteristic of the exception. A method of utilizing the processing device includes receiving an exception and determining a characteristic of the exception. The method further includes, at a first time, selectively enabling/disabling the timer of the processing device based on the characteristic, and, at a second time subsequent to the first time, accessing a count value stored at the timer. The method further includes providing the count value for output from the processing device.
1. A processing device comprising:
a first timer;
an exception controller configured to provide a first exception indicator representative of a first exception;
an instruction pipeline configured to execute an interrupt handler routine in response to the first exception indicator;
a timer controller configured to selectively enable/disable the first timer in response to a termination of execution of the interrupt handler routine; and
a timer control criteria storage component configured to store a configuration data for the first timer, the configuration data indicating a corresponding timer configuration for the first timer for each of a plurality of exception characteristics, the first exception having a select exception characteristic of the plurality of exception characteristics, and the configuration data including a first configuration data representing whether the first timer is to be enabled for each of the plurality of exception characteristics and a second configuration data representing whether the first timer is to be disabled for each of the plurality of exception characteristics; and
wherein the timer controller is configured to selectively enable/disable the first timer by:
determining a timer configuration for the first timer corresponding to the select exception characteristic from the configuration data; and
selectively enabling/disabling the first timer based on the timer configuration.
2. The processing device of claim 1 , wherein the first timer is selected from a group consisting of: a watchdog timer; a decrement timer; and a time-base timer.
3. The processing device of claim 1 , wherein the timer controller further is configured to selectively enable the first timer based on an exception type of the first exception.
4. The processing device of claim 1 , wherein:
the instruction pipeline is configured to provide an interrupt return indicator at the termination of the execution of the interrupt handler routine; and
the timer controller is configured to selectively enable/disable the first timer in response to the interrupt return indicator and based on a characteristic of the interrupt handler routine.
5. The processing device of claim 1 ,
wherein the first timer has a predetermined enable state prior to the first exception and the timer controller is configured to selectively enable/disable the first timer to return the first timer to the predetermined enable state in response to the termination of execution of the interrupt handler routine.
6. The processing device of claim 1 , further comprising:
a second timer; and
wherein the timer controller is configured to selectively enable/disable the second timer based on the a characteristic of the first exception, the characteristic comprising at least one of an exception type of the first exception, the interrupt handler routine invoked in response to the first exception indicator, and a source of the first exception.
7. The processing device of claim 1 , wherein:
the exception controller is configured to provide a second exception indicator representative of a second exception; and
the timer controller is configured to selectively enable/disable the first timer in response to the second exception indicator and based on a second characteristic of the second exception.
8. The processing device of claim 1 , wherein the timer controller further is configured to selectively enable the first timer based on a source of the first exception.
9. A method comprising:
receiving a first exception at a processing device;
determining a first characteristic of the first exception;
storing configuration data for a first timer at the processing device, the configuration data indicating a corresponding timer configuration for the first timer for each of a plurality of exception characteristics, the first exception having a select exception characteristic of the plurality of exception characteristics, and the configuration data including a first configuration data representing whether the first timer is to be enabled for each of the plurality of exception characteristics and a second configuration data representing whether the first timer is to be disabled for each of the plurality of exception characteristics;
at a first time, determining a first timer configuration for the first timer corresponding to the first exception characteristic from the configuration data and selectively enabling/disabling the first timer of the processing device based on the first timer configuration;
executing an interrupt handler routine at the processing device in response to the first exception;
at a second time subsequent to the first time, accessing a first count value stored at the first timer in response to termination of the interrupt handler routine; and
providing the first count value for output from the processing device.
10. The method of claim 9 , further comprising:
determining a performance characteristic of the processing device based on the first count value provided for output from the processing device.
11. The method of claim 9 , further comprising:
at a third time subsequent to the first time and prior to the second time, selectively enabling/disabling the first timer in response to termination of the execution of the interrupt handler routine.
12. The method of claim 11 , further comprising:
providing an interrupt return indicator at the termination of the execution of the interrupt handler routine; and
wherein selectively enabling/disabling the first timer in response to termination of the execution of the interrupt handler routine comprises selectively enabling/disabling the first timer in response to the interrupt return indicator and based on a characteristic of the interrupt handler routine.
13. The method of claim 11 , wherein:
the first timer has a predetermined enable state prior the first exception; and
selectively enabling/disabling the first timer in response to termination of the execution of the interrupt handler routine comprises selectively enabling/disabling the first timer to return the first timer to the predetermined enable state.
14. The method of claim 9 , further comprising:
at the first time, selectively enabling/disabling a second timer of the processing device in response to the first exception.
15. The method of claim 9 , further comprising:
receiving a second exception at the processing device;
determining a second characteristic of the second exception;
at a third time subsequent to the first time and prior to the second time, selectively enabling/disabling the first timer based on the second characteristic;
at the second time, accessing a second count value stored at the first timer; and
providing the second count value for output from the processing device.
16. The method of claim 9 , wherein the first characteristic is an exception type of the first exception.
17. The method of claim 9 , wherein the first characteristic is a source of the first exception.