IP Library Granted Patent US 8,164,365
Granted Patent B2
US 8,164,365 · App. 11/843,216 · Granted Apr 24, 2012

Non-resistive load driver

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Quick Facts
Patent No.
US 8,164,365
App. No.
11/843,216
Granted
Apr 24, 2012
Kind
B2
Abstract

Embodiments of the invention relate to a method and apparatus to drive non-resistive loads. The non-resistive load driver may include two or more drivers, such as a high-drive circuit and a low-drive circuit, to drive rail-to-rail output voltages and to stabilize the output voltages at a substantially constant level. The high-drive circuit may drive the output voltage of the non-resistive load driver to a threshold level, whereas the low-drive circuit may modify the output voltage of the non-resistive load driver to approximate an input voltage of the non-resistive load driver, and compensate any leakage associated with the non-resistive loads to provide a substantially constant output voltage. The low-drive circuit consumes less current than the high-drive circuit. The non-resistive load driver consumes less power and use less chip space. Alternatively, the non-resistive load driver may be implemented using a single driver with multiple modes, such as a low-drive mode and a high-drive mode, by changing a bias current of the non-resistive load driver between a high current mode and a low current mode.

Claims (35)

1. A device, comprising:

a voltage generator configured to generate an input voltage;

a first circuit configured to drive a non-resistive load to a threshold voltage level, the first circuit comprising;

a first comparator configured to compare a non-resistive load voltage to a first voltage;

a first switch configured to charge the non-resistive load when the first voltage is greater than the non-resistive load voltage;

a second comparator configured to compare the non-resistive load voltage to a second voltage, and

a second switch configured to discharge the non-resistive load when the non-resistive load voltage is greater than the second voltage; and

a second circuit configured to adjust the non-resistive load voltage to approximate the input voltage.

2. The device of claim 1 , further comprising a control logic having a control signal generator configured to generate one or more signals to select the first circuit or the second circuit.

3. The device of claim 1 , wherein the non-resistive load comprises at least one of a capacitive load, a partially resistive load, or an inductive load.

4. The device of claim 1 , wherein the device is capable of operating in a high-drive mode to drive the non-resistive load to the threshold voltage level, and a low-drive mode capable of adjusting the non-resistive load voltage to approximate the input voltage, and to keep the non-resistive load voltage at a substantially constant level.

5. The device of claim 4 , where the first circuit is associated with the high-drive mode and the second circuit is associated with the low-drive mode.

6. The device of claim 1 , wherein the second circuit is configured to adjust the non-resistive load voltage by canceling an offset voltage associated with the non-resistive load.

7. The device of claim 4 , wherein the device is capable of driving the non-resistive load to rail-to-rail voltages.

8. The device of claim 4 , wherein the threshold voltage level is offset from the input voltage by a small amount.

9. The device of claim 1 , wherein the threshold voltage level is between the first voltage and the second voltage, the first voltage is substantially a difference between the input voltage and an offset voltage, and the second voltage is substantially a sum of the input voltage and the offset voltage.

10. A method, comprising:

generating an input voltage;

driving a non-resistive load to a voltage within a voltage window, the voltage window being defined by the input voltage and an offset voltage during a high-drive mode;

adjusting a non-resistive load voltage to approximate the input voltage during a low-drive mode; and

compensating the non-resistive load voltage for leakage during the low-drive mode.

11. The method of claim 10 , further comprising generating at least one control signal to select at least one of the high-drive mode or the low-drive mode.

12. The method of claim 10 , wherein the driving a non-resistive load comprises driving at least one of a capacitive load, an inductive load, or a partially-resistive load.

13. The method of claim 10 , further comprising driving the non-resistive load to rail-to-rail voltages.

14. The method of claim 11 , further comprising changing a bias current between the high-drive mode and the low-drive mode, the low-drive mode consuming less current than the high-drive mode.

15. The method of claim 10 , further comprising not driving the non-resistive load during a no-drive mode.

16. The method of claim 10 , further comprising activating a first circuit to drive the non-resistive load to the voltage within the voltage window.

17. The method of claim 10 , further comprising activating a second circuit to adjust the non-resistive load voltage to approximate the input voltage, and to compensate the non-resistive load voltage for leakage.

18. A non-resistive load driver, comprising:

a voltage generator configured to generate an input voltage;

a high drive circuit configured to drive a non-resistive load to a voltage within a voltage range, the voltage range being defined by the input voltage and an offset voltage;

a low drive circuit configured to adjust a non-resistive load voltage to approximate the input voltage by canceling any offset voltages associated with the non-resistive load voltage; and

a control signal generator configured to generate one or more control signals to select at least one of the high-drive circuit or the low-drive circuit.

19. The non-resistive load driver of claim 18 , further comprising at least one offset voltage generator configured to change at least one bias voltage when selecting the high-drive circuit or the low-drive circuit.

20. The non-resistive load driver of claim 18 , wherein the voltage range is between a first voltage and a second voltage, the first voltage being a difference between the input voltage and the offset voltage, and the second voltage being a sum of the input voltage and the offset voltage.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded Dec 22, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 044949/0962 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 21, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 044938/0360 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 22, 2007
From: WRIGHT, DAVID; MURIBY, JASON; HANCIOGLU, ERHAN
To: CYPRESS SEMICONDUCTOR CORP.
Reel/Frame 019732/0815 →