Fabrication process of semiconductor device
View Patent ↗A method for fabricating a semiconductor device includes the steps of forming a first ferroelectric film over a lower electrode, crystallizing the first ferroelectric film, forming a second ferroelectric film in an amorphous state over the first ferroelectric film so as to fill voids existing on a surface of the first ferroelectric film, and forming an upper electrode over the second ferroelectric film of the amorphous state, wherein the crystallizing step of the first ferroelectric film is conducted by a thermal annealing process at a temperature of 585° C. or higher.
1. A method for fabricating a semiconductor device, comprising:
forming a first ferroelectric film over a lower electrode;
crystallizing said first ferroelectric film by a thermal annealing process at a temperature of 600° C. or higher;
forming a second ferroelectric film in an amorphous state over said first ferroelectric film so as to fill voids existing on a surface of said first ferroelectric film; and
forming an upper electrode over said second ferroelectric film of said amorphous state.
2. The method as claimed in claim 1 , wherein said crystallizing step of said first ferroelectric film is conducted in ambient containing oxygen.
3. The method as claimed in claim 2 , wherein said ambient contains an oxygen gas with a concentration of about 1.25%.
4. The method as claimed in claim 1 , further comprising, after said step of forming said upper electrode, a step of annealing said first and second ferroelectric films in an ambient containing oxygen at a temperature higher than said temperature used in said crystallizing step of said first ferroelectric film.
5. The method as claimed in claim 1 , wherein said first and second ferroelectric films are formed by a sputtering process.
6. The method as claimed in claim 1 , wherein said first and second ferroelectric films comprises a PZT film doped with at least one element selected from the group consisting of Ca, Sr, La, Nb, Ta, Ir and W.
7. The method as claimed in claim 1 , wherein said upper electrode is free from Pt.
8. The method as claimed in claim 1 , wherein said step of forming said first ferroelectric film forms said first ferroelectric film in an amorphous state.
9. The method as claimed in claim 1 , wherein said step of forming said upper electrode is carried out at a temperature lower than a temperature at which said second ferroelectric film undergoes crystallization.
10. The method as claimed in claim 9 , wherein said step of forming said upper electrode is carried out at a room temperature.
11. The method as claimed in claim 4 , wherein said step of annealing is carried out at a temperature of 725° C. or higher.
12. The method as claimed in claim 4 , further comprising the step, after said step of annealing, of forming another upper electrode on said upper electrode.
13. The method as claimed in claim 12 , wherein said upper electrode comprises IrOx and wherein said another upper electrode comprises IrO 2 .
14. The method as claimed in claim 1 , wherein said first ferroelectric film has a film thickness larger than a film thickness of said second ferroelectric film.
15. The method as claimed in claim 1 , further comprising the step of forming a protective film covering said lower electrode, said first ferroelectric film, said second ferroelectric film and said upper electrode.
16. The method as claimed in claim 1 , wherein said first ferroelectric film and said second ferroelectric film contain Pb, Zr and Ti therein.