Semiconductor device and manufacturing method thereof
View Patent ↗When adopting a stack-type capacitor structure for a ferroelectric capacitor structure ( 30 ), an interlayer insulating film ( 27 ) is formed between a lower electrode ( 39 ) (or a barrier conductive film) and a conductive plug ( 22 ) to eliminate an impact of orientation/level difference on a surface of the conductive plug ( 22 ) onto the ferroelectric film ( 40 ). Differently from a conductive film like the lower electrode ( 39 ) or the barrier conductive film, the interlayer insulating film ( 27 ) can be formed without inheriting the orientation/level difference from its lower layers by planarizing the surface thereof.
1. A semiconductor device comprising:
a semiconductor substrate;
a conductive plug formed above the semiconductor substrate;
a capacitor structure formed at a portion aligned with above the conductive plug by sandwiching a ferroelectric film having ferroelectric characteristics between a lower electrode and an upper electrode;
an interlayer insulating film formed between the conductive plug and the capacitor structure;
a conductive film which is formed to cover an upper surface of the conductive plug and has a longer width than a width of the lower electrode in cross-sectional view; and
a connecting portion, formed in the interlayer insulating film, for electrically connecting the conductive plug and the lower electrode via the conductive film,
wherein the connecting portion is located in a peripheral region of the lower electrode in plan view.
2. The semiconductor device according to claim 1 , wherein a surface at the lower electrode side of the interlayer insulating film is planarized.
3. The semiconductor device according to claim 1 , wherein the connecting portion is formed by a conductive material containing, at least, tungsten or copper.
4. The semiconductor device according to claim 1 , wherein the connecting portion is formed at a position over in and out of the lower electrode including the peripheral region of the lower electrode in plan view.
5. The semiconductor device according to claim 4 , wherein the connecting portion is formed by a conductive material containing, at least, Titanium-Aluminum-Nitrogen or a precious metal.
6. The semiconductor device according to claim 1 , wherein the connecting portion is formed to have a frame shape.
7. The semiconductor device according to claim 1 , wherein the connecting portion is formed into plural connecting portions each have a plug shape.
8. A semiconductor device comprising: a semiconductor substrate; a conductive plug formed above the semiconductor substrate; a capacitor structure formed at a portion aligned with above the conductive plug by sandwiching a ferroelectric film having ferroelectric characteristics between a lower electrode and an upper electrode; an interlayer insulating film formed between the conductive plug and the capacitor structure; a conductive film which is formed to cover an upper surface of the conductive plug and has a longer width than a width of the lower electrode in cross-sectional view; and a connecting portion, formed in the interlayer insulating film, for electrically connecting the conductive plug and the lower electrode via the conductive film, wherein the connecting portion is located in a peripheral region of the lower electrode in plan view, wherein the ferroelectric film has a high orientation at a first portion corresponding to an inside portion from the connecting portion, and a lower orientation at a second portion corresponding to a portion above the connecting portion as compared to the orientation at the first portion, in plan view.
9. The semiconductor device according to claim 8 , wherein the ferroelectric film has a highest lead content at a central portion thereof and a lowest lead content at its most outer peripheral portion in plan view, indicating a distribution of gradually lowering lead content from the central portion toward the most outer peripheral portion.
10. The semiconductor device according to claim 8 , wherein the ferroelectric film has a highest oxygen content at a central portion thereof and a lowest oxygen content at its most outer peripheral portion in plan view, indicating a distribution of gradually lowering oxygen content from the central portion toward the most outer peripheral portion.