Electro-static discharge protection device, semiconductor device, and method for manufacturing electro-static discharge protection device
An electrostatic discharge protection device including a gate electrode formed on a substrate. First and second diffusion regions of a first conductivity type are formed in the substrate with the gate electrode located in between. A first silicide layer is formed in the first diffusion region. A silicide block region is formed between the gate electrode and the first suicide layer. A third diffusion region is formed below the first silicide layer to partially overlap the first diffusion region. The third diffusion region and first silicide layer have substantially the same shapes and dimensions. The third diffusion region and a portion below the gate electrode located at the same depth as the third diffusion region contain impurities of a second conductivity type. The third diffusion region has an impurity concentration that is higher than that of the portion below the gate electrode.
1. An electro-static discharge protection device comprising:
a substrate;
a gate electrode formed over the substrate;
a first diffusion region of a first conductivity type and a second diffusion region of the first conductivity type formed in the substrate with the gate electrode located in between;
a first silicide layer formed in a local region in a surface of the first diffusion region, the first silicide layer being electrically coupled to an electrode pad;
a silicide block region serving as a ballast resistor formed in the surface of the first diffusion region between the gate electrode and the first silicide layer; and
a third diffusion region formed below the first silicide layer and at a position corresponding to the first silicide layer to partially overlap a lower end of the first diffusion region, wherein:
the third diffusion region and the first silicide layer have substantially the same shapes and dimensions in a lateral direction;
the third diffusion region and a portion below the gate electrode located at the substantially same depth as the third diffusion region contain impurities of a second conductivity type that differs from the first conductivity type; and
the third diffusion region has an impurity concentration higher than that of the portion below the gate electrode located at the substantially same depth;
wherein a pn junction surface of the first diffusion region of the first conductivity type and the substrate of the second conductivity type is formed below and corresponding to a substantial part of the silicide block region, and a diffusion region containing impurities of the second conductivity type with an impurity concentration higher than that of the portion below the gate electrode located at the substantially same depth is not formed on the pn junction surface below the silicide block region.
2. The electro-static discharge protection device according to claim 1 , further comprising:
a first sidewall insulation film formed on a side surface of the gate electrode, wherein the silicide block region is continuously formed between the first sidewall insulation film and the first silicide layer.
3. The electro-static discharge protection device according to claim 1 , further comprising:
a first sidewall insulation film formed on a side surface of the first gate electrode, wherein the silicide block region is spaced apart from the first sidewall insulation film; and
a second silicide layer formed in the surface of the first diffusion region between the silicide block region and the first sidewall insulation film.
4. The electro-static discharge protection device according to claim 1 , further comprising:
an insulation film formed on the silicide block region.
5. The electro-static discharge protection device according to claim 1 , further comprising:
a diffusion region formed below the third diffusion region and containing impurities of the first conductivity type at an impurity concentration higher than that of the first diffusion region.
6. The electro-static discharge protection device according to claim 1 , further comprising:
a third silicide layer formed in a surface of the second diffusion region.
7. The electro-static discharge protection device according to claim 1 , further comprising:
a fourth silicide layer formed on the gate electrode.
8. The electro-static discharge protection device according to claim 1 , wherein a function for a driver circuit is included.
9. A semiconductor device comprising:
an electrode pad;
an internal circuit electrically coupled to the electrode pad; and
the electro-static discharge protection device according to claim 1 coupled to a node between the electrode pad and the internal circuit.
10. The electro-static discharge protection device according to claim 1 , wherein the third diffusion region is formed below the first silicide layer and at a position corresponding to the first silicide layer and excluding a position substantially corresponding to the silicide block region.
11. The electro-static discharge protection device according to claim 1 , wherein a partially overlapped portion of the first diffusion region and the third diffusion region is substantially aligned with the silicide layer.
12. An electro-static discharge protection device comprising:
a substrate;
a first gate electrode formed over the substrate;
a second gate electrode spaced apart from the first gate electrode on the substrate;
a node region of a first conductivity type formed in the substrate between the first gate electrode and the second gate electrode;
a first diffusion region of the first conductivity type and a second diffusion region of the first conductivity type formed in the substrate so that the first gate electrode, the second gate electrode, and the node region are located in between;
a first silicide layer formed in a local region in a surface of the first diffusion region at a first gate electrode side, the first silicide layer being electrically coupled to an electrode pad;
a silicide block region serving as a ballast resistor formed in the surface of the first diffusion region between the first gate electrode and the first silicide layer; and
a third diffusion region formed below the first silicide layer and at a position corresponding to the first silicide layer to partially overlap a lower end of the first diffusion region, wherein:
the third diffusion region and the first silicide layer have substantially the same shapes and dimension in a lateral direction;
the third diffusion region and a portion below each of the first and second gate electrodes located at the substantially same depth as the third diffusion region contain impurities of a second conductivity type that differs from the first conductivity type; and
the third diffusion region has an impurity concentration higher than that of the portion below each of the first and second gate electrodes located at the substantially same depth;
wherein a pn junction surface of the first diffusion region of the first conductivity type and the substrate of the second conductivity type is formed below and corresponding to a substantial part of the silicide block region, and a diffusion region containing impurities of the second conductivity type with an impurity concentration higher than that of the portion below the gate electrode located at the substantially same depth is not formed on the pn junction surface below the silicide block region.
13. The electro-static discharge protection device according to claim 12 , further comprising:
a first sidewall insulation film formed on a side surface of the first gate electrode, wherein the silicide block region is continuously formed between the first sidewall insulation film and the first silicide layer.
14. The electro-static discharge protection device according to claim 12 , including a function of a driver circuit.
15. A semiconductor device comprising:
an electrode pad;
an internal circuit electrically coupled to the electrode pad; and
the electro-static discharge protection device according to claim 12 coupled to a node between the electrode pad and the internal circuit.
16. The electro-static discharge protection device according to claim 12 , wherein the third diffusion region is formed below the first silicide layer and at a position corresponding to the first silicide layer and excluding a position substantially corresponding to the silicide block region.
17. The electro-static discharge protection device according to claim 12 , wherein a partially overlapped portion of the first diffusion region and the third diffusion region is substantially aligned with the silicide layer.