Manufacturing method of a tray, a socket for inspection, and a semiconductor device
View Patent ↗The yield of semiconductor devices is to be enhanced. A tray is provided with a plurality of pockets each capable of accommodating a wafer level CSP, and each of the pockets is provided with a base for supporting a plurality of bumps of the wafer level CSP and side walls formed around the base. In the step-to-step carriage in the post-production process of the manufacture of wafer level CSPs and on like occasions, the base supports not the organic film but the plurality of solder bumps. For this reason, it is made possible to prevent the organic film from being flawed or coming off and adhering to the product as foreign matter, and as a result the quality and yield of the wafer level CSPs (semiconductor devices) can be improved.
1. A carriage device comprising:
semiconductor devices; and
a tray capable of accommodating the semiconductor devices,
each of the semiconductor devices comprising:
a semiconductor chip having a main surface, a rear surface opposite to said main surface,
a wiring layer formed over said main surface,
an organic film covering the wiring layer and containing opening portions in which the wiring layer is partly exposed, and
a plurality of ball electrodes electrically connected to said wiring layer,
wherein the tray is provided with a plurality of accommodating portions each capable of accommodating a semiconductor device, of the semiconductor devices, and
wherein each of the accommodating portions has a base to support said plurality of ball electrodes of the semiconductor device while maintaining a height of the ball electrodes, and side walls formed around the base such that a first groove portion is formed around the base and such that a second groove portion is formed in the base, continuously to the first groove portion.
2. The carriage device according to claim 1 , wherein the tray is formed of a heat-resistant material.
3. The carriage device according to claim 1 , wherein the tray is formed of a non-heat-resistant material.
4. The carriage device according to claim 1 , wherein the accommodating portion has the base having no through hole formed therein and said side walls.
5. The carriage device according to claim 1 , wherein, when a plurality of trays are stacked, at least part of the space between the rear surface of a tray at the upper level and the front surface of a tray at the lower level communicates with outside said trays.
6. The carriage device according to claim 1 , wherein a size of the semiconductor device is substantially equal to a size of the semiconductor chip.
7. The carriage device according to claim 1 , wherein the rear surface and a side surface of the semiconductor device are exposed.
8. The carriage device according to claim 1 , wherein the tray accommodates the semiconductor device in a state of exposing the rear surface and side faces of the semiconductor device.
9. The carriage device according to claim 1 , wherein the tray is comprised of an insulative material in which electroconductive particles are mixed.
10. The carriage device according to claim 1 , wherein the semiconductor device is shipped in a state that the semiconductor device is accommodated by the tray.
11. The carriage device according to claim 1 , wherein the semiconductor devices are carried in a state that the semiconductor devices are accommodated by the tray.
12. The carriage device according to claim 1 , wherein said second groove is in a cross shape in the base, continuous from the base to the first groove portion.