Electronic circuit with low noise delay circuit
View Patent ↗An electronic circuit comprises a delay circuit that with a chain of saw tooth delay stages ( 10 a - d ), coupled in a loop to form an oscillator for example. Each stage comprises an integrating circuit ( 104 ) and a current modulator ( 106 ) coupled to the integrating circuit ( 104 ). Each stage triggers a transition in the next stage when the integration result reaches a level defined by a reference voltage. Correlating circuitry ( 102, 30, 32, 34 ) is provided with current outputs to generate currents to the current modulators ( 106 ) and reference voltages for the saw tooth delay stages ( 10 a - d ). The reference voltages are generated at least partly from a common reference ( 102 c ), so that noise in the currents from the current modulators ( 106 ) and reference voltages is correlated in a way that at least partly cancels the effect of the noise on the delay time.
1. An electronic circuit, comprising a delay circuit that comprises a chain of saw tooth delay stages and correlating circuitry, each saw tooth delay stage comprising an integrating circuit and a current modulator coupled between the integrating circuit and a respective current output of the correlating circuitry, the current modulator of each successive saw tooth delay stage having a reference input and a chained input coupled to an output of the integrating circuit of a preceding saw tooth delay stage in the chain, the correlating circuitry being coupled to the reference input of the current modulator of at least a first one of the saw tooth delay stages, the correlating circuitry being arranged to generate a current from at least one of the current outputs and a reference voltage at the reference input of said first one of the saw tooth delay stages at least partly from a common reference.
2. An electronic circuit according to claim 1 , wherein the current modulator coupled to said at least one of the current outputs of the correlation circuitry comprises a current splitter circuit, having an input coupled to the respective current output of the correlating circuitry and first and second outputs coupled to the integrating circuit and a resistance respectively, the current modulator being arranged to modulate a ratio between currents through the first and second outputs under control of a difference between voltages at the chained input and the reference input, a node between the second output and the resistance being coupled to the reference input of said first one of the saw tooth delay stages.
3. An electronic circuit according to claim 2 , wherein the current modulator that is coupled to said at least one of the current outputs is the current modulator of a second one of the saw tooth delay stages other than the first one of the saw tooth delay stages.
4. An electronic circuit according to claim 1 , wherein the current modulator of each saw tooth delay stage comprises a current splitter circuit, having a current input coupled to the respective current output of the correlating circuitry and first and second outputs coupled to the integrating circuit and a resistance of the saw tooth delay stage respectively, the current modulator being arranged to modulate a ratio between currents through the first and second outputs under control of a difference between voltages at the chained input and the reference input, the saw tooth delay stages being coupled in an oscillator loop, a node between the second output and the resistance of each particular saw tooth delay stage being coupled to the reference input of a respective different saw tooth delay stage.
5. An electronic circuit according to claim 2 , wherein said at least one of the current outputs is coupled to the first one of the saw tooth delay stages.
6. An electronic circuit according to claim 1 , wherein the correlating circuitry comprises a reference current source and a current mirror comprising a current mirror input coupled to the reference current source and a plurality of current mirror outputs forming the current outputs coupled to the current modulators of respective ones of the saw tooth delay circuits.
7. An electronic circuit according to claim 2 , comprising a resistance coupled to a further current mirror output of the current mirror, a node between the resistance and the further current mirror output being coupled to the reference input of said first one of the saw tooth delay stages.
8. An electronic circuit according to claim 1 , wherein the saw tooth delay stages are coupled in an oscillator loop.