IP Library Patent Application 12172555
Patent Application
App. No. 12/172,555

INCREASING ELECTROMIGRATION RESISTANCE IN AN INTERCONNECT STRUCTURE OF A SEMICONDUCTOR DEVICE BY FORMING AN ALLOY

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Patent No.
US None
App. No.
12/172,555
Abstract

By introducing a metallic species into an exposed surface area of a copper region, the electromigration behavior of this surface area may be significantly enhanced. The incorporation of the metallic species may be accomplished in a highly selective manner so as to not unduly affect dielectric material positioned adjacent to the metal region, thereby essentially avoiding undue increase of leakage currents.

Claims (31)

1 . A method, comprising:

forming a mask above a metal region formed in a dielectric material of a metallization layer of a semiconductor device, said mask exposing a surface of said metal region and covering said dielectric material;

applying a metallic species through said mask to said exposed surface of said metal region;

removing said mask; and

forming a dielectric cap material above said metallization layer, said dielectric cap material covering said surface containing said metallic species.

2 . The method of claim 1 , wherein applying said metallic species comprises performing an ion implantation process to introduce ions of said metallic species into said surface.

3 . The method of claim 1 , wherein applying said metallic species comprises performing plasma treatment in a plasma ambient containing ions of said metallic species.

4 . The method of claim 1 , wherein applying said metallic species comprises forming a metal layer comprised of said metallic species on said exposed surface.

5 . The method of claim 4 , wherein forming said metal layer comprises performing an electrochemical deposition process.

6 . The method of claim 4 , wherein forming said metal layer comprises depositing said metallic species by at least one of a chemical vapor deposition process and a physical vapor deposition process.

7 . The method of claim 1 , wherein said metallic species has an atomic radius that is greater than an atomic radius of copper.

8 . The method of claim 1 , further comprising forming a lower metallization layer prior to forming said metallization layer, wherein said lower metallization layer comprises a metal line, wherein said method further comprises forming said dielectric material above said lower metallization layer, forming a via opening in said dielectric material to expose a portion of said metal line and introducing said metallic species into a surface of said exposed portion.

9 . The method of claim 8 , wherein said metallic species is introduced by implanting said metallic species through said via opening.

10 . A method, comprising:

forming a metal layer above a dielectric layer of a metallization layer of a semiconductor device so as to fill an opening in said dielectric layer;

performing an implantation process to introduce a metallic species through an exposed surface of said metal layer; and

removing excess material of said metal layer from said dielectric layer to form a metal region in said dielectric layer, said metal region having a surface comprising said metallic species.

11 . The method of claim 10 , further comprising forming a conductive barrier material on said dielectric layer and an inner surface of said opening prior to forming said metal layer.

12 . The method of claim 11 , wherein forming said metal layer comprises depositing said metal layer by performing an electrochemical deposition process.

13 . The method of claim 10 , wherein said metal layer comprises copper and said metallic species is a non-copper containing species.

14 . The method of claim 13 , wherein said metallic species has an atomic radius that is greater than an atomic radius of copper.

15 . The method of claim 10 , wherein forming said metal layer comprises depositing a metal material with a first excess height and removing a portion of said metal material to obtain a second reduced excess height.

16 . The method of claim 10 , further comprising forming a lower metallization layer prior to forming said metallization layer, wherein said lower metallization layer comprises a metal line and wherein said method further comprises forming said dielectric layer above said lower metallization layer, forming a via opening in said dielectric layer to expose a portion of said metal line and introducing said metallic species into a surface of said exposed portion.

17 . The method of claim 16 , wherein said metallic species is introduced by implanting said metallic species through said via opening.

18 . A method, comprising:

forming a via opening in a dielectric layer, said via opening extending to and exposing a portion of a metal region formed in a first metallization layer of a semiconductor device;

performing an ion implantation process to introduce a metallic species into said exposed portion of said metal region; and

filling said via opening with a metal.

19 . The method of claim 18 , further comprising forming a trench in said dielectric layer, filling said trench with said metal to form a metal line and providing said metallic species at a surface of said metal line.

20 . The method of claim 19 , wherein providing said metallic species at the surface of said metal line comprises forming a mask above said dielectric layer to expose said surface and applying said metallic species on the basis of said mask.

21 . The method of claim 19 , wherein providing said metallic species at the surface of said metal line comprises forming a metal layer when filling said trench, introducing said metal species into said metal layer and removing excess material of said metal layer to expose said surface containing said metallic species.

Assignments (2)
AFFIRMATION OF PATENT ASSIGNMENT Recorded Aug 18, 2009
From: ADVANCED MICRO DEVICES, INC.
To: GLOBALFOUNDRIES INC.
Reel/Frame 023120/0426 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 14, 2008
From: LEHR, MATTHIAS; MEYER, MORITZ-ANDREAS; LANGER, ECKHARD
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 021233/0651 →