Pre-charge sensing scheme for non-volatile memory (NVM)
View Patent ↗The pipe effect can significantly degrade flash performance. A method to significantly reduce pipe current and (or neighbor current using a pre-charge sequence) is disclosed. A dedicated read order keeps the sensing node facing the section of the pipe which was pre-charged. The technique involves pre-charging several global bitlines (such as metal bitlines, or MBLs) and local bitlines (such as diffusion bitlines, or DBLs). The pre-charged global bitlines are selected according to a pre-defined table per each address. The selection of the global bitlines is done according to whether these global bitlines will interfere with the pipe during the next read cycle.
1. A method of reading one or more non-volatile memory (“NVM”) cells in an NVM array, said method comprising: pre-charging or discharging one or more bitlines which are not directly connected to said one or more NVM cells being read, wherein pre-charging or discharging comprises pre-charging or discharging several global bitlines and local bitlines and wherein the selection of the global bitlines is done according to whether these global bitlines will interfere with sensing during the next read cycle.
2. The method of claim 1 , further comprising: reading the one or more NVM cells in an order which keeps a sensing node of the cells being read facing a bitline which has been pre-charged or discharged.
3. The method of claim 1 , wherein the pre-charged or discharged global bit lines are selected according to a pre-defined table per each address.
4. A method of reading a plurality of non-volatile memory (NVM) cells which are arranged in a row of memory cells, using one of the cell's two diffusion bitlines as a sensing node, comprising: pre-charging or discharging global bitlines and local bitlines, wherein the pre-charged or discharged global bitlines are selected so as to mitigate pipe effect during a next read cycle; and performing read in an order which keeps a sensing node facing a bitline which was pre-charged or discharged.
5. The method of claim 4 , wherein the pre-charged or discharged global bitlines are selected according to a pre-defined table per each address.