Granted Patent B2

US 8,458,364 · App. 12/375,795 · Granted Jun 4, 2013

Abstract

Claims (43)

1. A method for receiving and processing frames, the method comprises:

receiving a frame;

associating a frame timestamp with the frame;

storing the frame and the associated timestamp at a certain buffer out of a group of buffers;

generating a valid timing information frame indicator if the received frame is a valid timing information frame;

storing the valid timing information frame indicator at a certain buffer descriptor associated with the certain buffer; and

processing timing information within the frame to synchronize at least two clocks in response to the valid timing information frame indicator being valid and in response to the certain buffer, containing the frame, not being accessed for a predefined period.

2. The method according to claim 1 further comprising processing information stored in at least one buffer descriptor.

3. The method according to claim 2 wherein the processing is preceded by scanning a group of buffer descriptors associated with the group of buffers.

4. The method according to claim 2 wherein the processing comprises processing the frame according to a programmable frame processing code.

5. The method according to claim 2 wherein the processing comprises ignoring timestamps associated with frames that differ from valid timing information frames.

6. The method according to claim 2 wherein the processing is preceded by scheduling the processing to initiate without a reception of an interrupt from a timestamp unit.

7. The method according to claim 1 wherein the associating comprises retrieving a timestamp generated by a real time clock generator when a predefined portion of the frame is detected by a hardware parser.

8. The method according to claim 1 wherein the method comprises:

receiving multiple frames;

associating a frame timestamp with each of the multiple frames;

storing the multiple frames and the associated timestamps at a group of buffers;

generating at least one valid timing information frame indicator if at least one of the multiple frames is a valid timing information frame; and

storing the at least one valid timing information frame indicator at least one buffer descriptor associated with at least one buffer that stores the at least one valid timing information frame, wherein the timing information within the frame is processed in response to the group of buffers, containing the multiple frames, not being accessed for the predefined period of time.

9. The method according to claim 2 wherein the method comprises synchronizing at least two clocks in response to valid timing information stored in the certain buffer.

10. The method according to claim 2 wherein the associating comprises retrieving a timestamp generated by a real time clock generator when a predefined portion of the frame is detected by a hardware parser.

11. A device having frame receiving and processing capabilities, the device comprises:

a real time clock generator;

a timestamp unit adapted to associate a frame timestamp with a received frame;

at least one storage device adapted to store the frame and the associated timestamp at a certain buffer out of a group of buffers; and

a processor adapted to generate a valid timing information frame indicator if the received frame is a valid timing information frame, and to process timing information within the received frame to synchronize at least two clocks in response to the valid timing information frame indicator being valid and in response to the certain buffer, containing the frame, not being accessed for a predefined period;

wherein the device is further adapted to store the valid timing information frame indicator at a certain buffer descriptor associated with the certain buffer.

12. The device according to claim 11 wherein the processor is adapted to process information stored in at least one buffer descriptor.

13. The device according to claim 11 wherein the processor is adapted to scan a group of buffer descriptors associated with the group of buffers.

14. The device according to claim 11 wherein the processor is adapted to process a frame according to a programmable frame processing code.

15. The device according to claim 11 wherein the processor is adapted to ignore timestamps associated with frames that differ from valid timing information frames.

16. The device according to claim 11 wherein the processor is adapted to schedule a processing of buffers such as to initiate without a reception of an interrupt from a timestamp unit.

17. The device according to claim 11 wherein the timestamp unit is adapted to retrieve a timestamp generated by a real time clock generator when a predefined portion of the frame is detected by a hardware parser.

18. The device according to claim 11 wherein the device is adapted to receive multiple frames, associate a frame timestamp with each of the multiple frames; store the multiple frames and the associated timestamps at the group of buffers; generate at least one valid timing information frame indicator if at least one of the multiple frames is a valid timing information frame and store the at least one valid timing information frame indicator at least one buffer descriptor associated with at least one buffer that stores the at least one valid timing information frame, wherein the timing information within the received frame is processed in response to the group of buffers, containing the multiple frames, not being accessed for the predefined period of time.

19. A method for receiving and processing frames, the method comprises:

receiving multiple frames;

associating a frame timestamp with each of the multiple frames;

storing the multiple frames and the associated timestamps at a group of buffers;

generating at least one valid timing information frame indicator if at least one of the multiple frames is a valid timing information frame;

storing the at least one valid timing information frame indicator at least one buffer descriptor associated with at least one buffer that stores the at least one valid timing information frame; and

processing timing information within a first frame of the multiple frames to synchronize at least two clocks in response to one of the at least one valid timing information frame indicator associated with the first frame being valid and in response to the group of buffers, containing the multiple frames, not being accessed for a predefined period.

20. The method of claim 19 further comprising:

generating an interrupt in response to the group of buffers not being accessed for a predefined period.

Assignments (31)