IP Library Granted Patent US 8,021,970
Granted Patent B2
US 8,021,970 · App. 12/408,444 · Granted Sep 20, 2011

Method of annealing a dielectric layer

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Quick Facts
Patent No.
US 8,021,970
App. No.
12/408,444
Granted
Sep 20, 2011
Kind
B2
Abstract

A method includes forming a first dielectric layer over a substrate; forming nanoclusters over the first dielectric layer; forming a second dielectric layer over the nanoclusters; annealing the second dielectric layer using nitrous oxide; and after the annealing the second dielectric layer, forming a gate electrode over the second dielectric layer.

Claims (51)

1. A method comprising:

forming a first dielectric layer over a substrate;

forming nanoclusters over the first dielectric layer;

forming a second dielectric layer over the nanoclusters;

annealing the second dielectric layer using nitrous oxide;

after the annealing the second dielectric layer, forming a gate electrode over the second dielectric layer; and

forming a select gate electrode over the substrate and laterally adjacent the gate electrode, wherein a portion of the first dielectric layer, a portion of the nanoclusters, and a portion of the second dielectric layer are between the gate electrode and the select gate electrode.

2. The method of claim 1 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using nitrous oxide at a temperature in a range of approximately 700 degrees Celsius to approximately 1200 degrees Celsius.

3. The method of claim 1 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using nitrous oxide at a temperature in a range of approximately 850 degrees Celsius to approximately 1050 degrees Celsius.

4. The method of claim 1 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using nitrous oxide for a duration in a range of approximately 15 second to approximately 90 seconds.

5. The method of claim 1 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using nitrous oxide for a duration in a range of approximately 45 second to approximately 60 seconds.

6. The method of claim 1 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using pure nitrous oxide.

7. The method of claim 1 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using nitrous oxide in a nitrogen-containing carrier gas.

8. The method of claim 1 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using nitrous oxide in an argon-containing carrier gas.

9. The method of claim 1 , wherein forming the second dielectric layer comprises:

forming an oxide layer using a silicon-containing gas.

10. The method of claim 9 , wherein the forming the oxide layer using the silicon-containing comprises:

forming a high temperature oxide layer using a silicon-containing gas.

11. A method comprising:

growing a first dielectric layer over a substrate;

chemical vapor depositing nanoclusters over the first dielectric layer;

forming a second dielectric layer over the nanoclusters using a silicon-containing gas;

annealing the second dielectric layer using nitrous oxide;

after the annealing the second dielectric layer, forming a gate electrode over the second dielectric layer; and

annealing the second dielectric layer using nitrous oxide for a duration in a range of approximately 45 second to approximately 60 seconds.

12. The method of claim 11 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using nitrous oxide at a temperature in a range of approximately 850 degrees Celsius to approximately 1050 degrees Celsius.

13. The method of claim 11 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using pure nitrous oxide.

14. The method of claim 11 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using nitrous oxide in a nitrogen-containing carrier gas.

15. The method of claim 11 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using nitrous oxide in an argon-containing carrier gas.

16. The method of claim 11 , wherein the forming the second dielectric layer comprises:

forming a high temperature oxide layer using the silicon-containing gas.

17. A method comprising:

forming a select gate electrode over a substrate;

forming a first dielectric layer over the substrate, adjacent a sidewall of the select gate, and over the select gate;

forming nanoclusters over the first dielectric layer;

forming a second dielectric layer over the nanoclusters;

annealing the second dielectric layer using nitrous oxide; and

after the annealing the second dielectric layer, forming a control gate electrode over the second dielectric layer, wherein the control gate electrode is laterally adjacent the select gate electrode, and wherein a portion of the first dielectric layer, a portion of the nanoclusters, and a portion of the second dielectric layer are between the control gate electrode and the select gate electrode.

18. The method of claim 17 , wherein the annealing the second dielectric layer comprises:

annealing the second dielectric layer using pure nitrous oxide, using nitrous oxide in a nitrogen-containing carrier gas, or using nitrous oxide in an argon-containing carrier gas.

Assignments (18)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
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CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0793 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 19, 2009
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2009
From: SHEN, JINMIAO J.; HONG, CHEONG M.; KANG, SUNG-TAEG; ROSSOW, MARC A.
To: FREESCALE SEMICONDUCTOR, INC.
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