IP Library Granted Patent US 8,319,310
Granted Patent B2
US 8,319,310 · App. 12/415,037 · Granted Nov 27, 2012

Field effect transistor gate process and structure

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Quick Facts
Patent No.
US 8,319,310
App. No.
12/415,037
Granted
Nov 27, 2012
Kind
B2
Abstract

A Schottky gate ( 27′, 27″ ) of a metal-semiconductor FET ( 20′, 20″ ) is formed on a semiconductor comprising substrate ( 21 ) by, etching a gate recess ( 36 ) so as to expose a slightly depressed surface ( 362 ) of the substrate ( 21 ), the etching step also producing surface undercut cavities ( 363 ) extending laterally under the etch mask ( 43 ) from the gate recess ( 36 ), then conformally coating the slightly depressed surface ( 362 ) with a first Schottky forming conductor ( 40′ ) and substantially also coating inner surfaces ( 366 ) of the surface undercut cavities ( 363 ), and forming a Schottky contact to the semiconductor comprising substrate ( 21 ), adapted when biased to control current flow in a channel ( 22 ) extending between source ( 23 ) and drain ( 24 ) of the FET ( 20′, 20″ ) under the gate recess ( 36 ). In further embodiments, a conformal or non-conformal barrier layer conductor ( 41′, 41″ ) may be provided over the Schottky forming conductor ( 40′ ) and a thicker overlying gate conductor ( 442, 272 ) provided over the barrier layer conductor ( 41′, 41″ ).

Claims (35)

1. A method for forming a metal-semiconductor field effect transistor (MESFET), comprising:

providing a substrate having a mask layer thereon with an opening extending to a surface region of the substrate;

etching a gate recess in the surface region of the substrate so as to expose a depressed surface of the substrate and also form surface undercut cavities extending laterally under the mask layer from the gate recess; and

substantially conformally coating the depressed surface and inner surfaces of the surface undercut cavities with a Schottky forming conductor that does not completely fill the surface undercut cavities, thereby forming a Schottky gate contact to the substrate, adapted when biased to control current flow in a channel underlying the gate recess.

2. The method of claim 1 , further comprising,

forming a non-conformal barrier layer conductor over the Schottky forming conductor, wherein the barrier layer conductor does not fill the surface undercut cavities.

3. The method of claim 2 , further comprising, forming an overlying gate conductor over the barrier layer conductor, resulting in a MESFET in which the surface undercut cavities are at least partially defined by the barrier layer conductor and portions of the Schottky forming conductor coated on the inner surfaces of the surface undercut cavities.

4. The method of claim 3 , wherein the overlying gate conductor is formed by evaporation.

5. The method of claim 1 , further comprising forming a source and a drain region on the substrate laterally separated from the gate recess and the Schottky forming conductor and adapted to communicate with the channel underlying the gate recess.

6. The method of claim 5 , wherein the source and drain are formed before or after the Schottky forming conductor.

7. The method of claim 1 , wherein the Schottky forming conductor is formed by sputtering.

8. The method of claim 1 , wherein the gate recess has a depth and the surface undercut cavities each have a lateral width which is about 0 to 500 percent of the depth.

9. The method of claim 1 , wherein the gate recess has a depth and the surface undercut cavities each have a lateral width and a ratio R of the lateral width divided by the depth is about 0 to 10.

10. The method of claim 9 , wherein the ratio R is about 0 to 5.

11. The method of claim 1 , wherein the substrate comprises one or more III-V semiconductors and the Schottky forming conductor comprises Ti, TiW, TiWN, WSi or combinations thereof.

12. The method of claim 1 , wherein the gate recess has a first depth and the Schottky forming conductor has a first thickness and the first thickness is about 30-80% of the first depth.

13. The method of claim 1 , further comprising:

forming a conformal barrier layer conductor over the Schottky forming conductor, so as to completely fill the surface undercut cavities with the Schottky forming conductor and the barrier layer conductor.

14. A metal-semiconductor field effect transistor (MESFET), comprising:

a semiconductor substrate having a gate region in which is located a surface portion of the substrate bordered by lateral undercut regions;

a Schottky contact forming conductor overlying the surface portion of the substrate and on sidewalls of the lateral undercut regions, wherein the Schottky contact forming conductor is conformally coated on the surface portion of the substrate and on the sidewalls of the lateral undercut regions and does not completely fill the lateral undercut regions.

15. The MESFET of claim 14 , wherein the undercut regions have a first depth substantially perpendicular to the surface portion and the Schottky forming conductor has a first thickness substantially perpendicular to the surface portion and wherein the first thickness is 30-80% of the first depth.

16. The MESFET of claim 14 , in which the surface portion is located in a recess in the substrate.

17. A method for forming a gate conductor of a metal-semiconductor field effect transistor (MESFET), comprising:

providing a substrate having a semiconductor first surface;

applying a mask having an opening above the semiconductor first surface;

etching the semiconductor first surface through the opening substantially vertically to a first depth thereby exposing an interior surface of the substrate and substantially laterally underneath edges of the mask adjacent the opening to a first distance, thereby forming a recess having the interior surface and lateral undercut regions with sidewalls shadowed by the edges of the mask; and

conformally depositing a Schottky forming conductor of a first thickness on the interior surface and on the sidewalls of the lateral undercut regions, wherein the Schottky forming conductor does not completely fill the lateral undercut regions.

18. The method of claim 17 , wherein the first thickness is about 30% to 80% of the first depth.

19. The method of claim 17 , wherein the Schottky forming conductor is formed by sputtering.

20. A metal-semiconductor field effect transistor (MESFET), comprising:

a semiconductor substrate having a gate region in which is located a surface portion of the substrate bordered by lateral undercut regions;

a Schottky contact forming conductor overlying the surface portion of the substrate and on sidewalls of the lateral undercut regions, wherein the Schottky contact forming conductor does not completely fill the lateral undercut regions;

a barrier layer conductor overlying the Schottky forming conductor, wherein the barrier layer conductor also does not completely fill the lateral undercut regions; and

an overlying gate conductor over the barrier layer conductor, wherein the lateral undercut regions are at least partially defined by the overlying gate conductor, the barrier layer conductor, and portions of the Schottky forming conductor formed on the sidewalls of the lateral undercut regions.

Assignments (27)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
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PATENT RELEASE Recorded Dec 21, 2015
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SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
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SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 19, 2009
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 20, 2009
From: HUANG, JENN HWA
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