IP Library Granted Patent US 8,779,465
Granted Patent B2
US 8,779,465 · App. 12/441,311 · Granted Jul 15, 2014

Semiconductor device and method of forming a semiconductor device

Inventors: Jean-Michel Reynes (Pompertuzat, FR); Philippe Lance (Toulouse, FR); Evgueniy Stefanov (Vielle Toulouse, FR); Yann Weber (Toulouse, FR)
Assignee: Freescale Semiconductor, Inc.
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Quick Facts
Patent No.
US 8,779,465
App. No.
12/441,311
Granted
Jul 15, 2014
Kind
B2
Abstract

A semiconductor device arrangement comprises a semiconductor device and an injector device. The semiconductor device comprises a first current electrode region of a first conductivity type, a second current electrode region of the first conductivity type, a drift region between the first and the second current electrode regions, and at least one floating region of a second conductivity type formed in the drift region. The injector device is arranged to receive an activation signal when the semiconductor device is turned on and to inject charge carriers of the second conductivity type into the drift region and the at least one floating region in response to receiving the activation signal.

Claims (38)

1. A semiconductor device arrangement comprising:

a semiconductor device comprising:

a semiconductor substrate of a first conductivity type forming a second current electrode region, the substrate having a first surface and a second surface;

a semiconductor layer formed over the first surface of the semiconductor substrate;

a first current electrode region of the first conductivity type formed in the semiconductor layer,

a drift region of the first conductivity type between the first and the second current electrode regions,

at least one floating region of a second conductivity type formed in the drift region; and

an injector device comprising an injector region of the second conductivity type formed in the semiconductor layer, the injector device for injecting charge carriers of the second conductivity type into the drift region and the at least one floating region in response to being activated by application of an activation signal.

2. A semiconductor device arrangement of claim 1 , wherein the at least one floating region is electrically isolated from the first and second current electrode regions.

3. A semiconductor device arrangement of claim 2 , wherein the semiconductor device further comprises a semiconductor substrate forming the second current electrode region, the semiconductor layer being formed over the semiconductor substrate, and wherein the first current electrode region is formed in the semiconductor layer extending from a first surface of the semiconductor layer, and the injector device comprises an injector region of the second conductivity type formed in the semiconductor layer extending from the first surface and the drift region is formed in the semiconductor layer.

4. A semiconductor device arrangement of claim 1 , wherein the semiconductor device is one of a unipolar device, a vertical semiconductor device, a MOSFET device and an IGBT device.

5. A semiconductor device arrangement of claim 1 , wherein the semiconductor device further comprises a semiconductor substrate forming the second current electrode region, the semiconductor layer being formed over the semiconductor substrate, and wherein the first current electrode region is formed in the semiconductor layer extending from a first surface of the semiconductor layer, and the injector device comprises an injector region of the second conductivity type formed in the semiconductor layer extending from the first surface and the drift region is formed in the semiconductor layer.

6. A semiconductor device arrangement of claim 1 , wherein the injector device further comprises a contact electrode coupled to the injector region for receiving the activation signal.

7. A semiconductor device arrangement of claim 6 , wherein the semiconductor device comprises a plurality of base cells, each base cell comprising first and second current electrode regions, a drift region and at least one floating region and wherein the semiconductor device arrangement comprises one or more injector devices for the plurality of base cells.

8. A semiconductor device arrangement of claim 1 , further comprising a control electrode for controlling a flow of current through a channel between the first current electrode region and the second current electrode region.

9. A semiconductor device arrangement of claim 8 , further comprising control circuitry for providing a control signal to the control electrode to turn the semiconductor device on and for providing the activation signal to the injector device in dependence on the provision of the control signal.

10. A semiconductor device arrangement of claim 9 , wherein the control circuitry is arranged to provide the activation signal to the injector device before providing the control signal to the control electrode.

11. A semiconductor device arrangement of claim 1 , wherein the semiconductor device comprises a plurality of base cells, each base cell comprising first and second current electrode regions, a drift region and at least one floating region and wherein the semiconductor device arrangement comprises one or more injector devices for the plurality of base cells.

12. The semiconductor device of claim 1 , wherein the drift region and the at least one floating region are arranged such that the at least one floating region and the drift region are depleted when the semiconductor device is off.

13. A method of forming a semiconductor device arrangement comprising a semiconductor device, the method comprising the steps of:

providing a semiconductor substrate of a first conductivity type;

providing a semiconductor layer of the first conductivity type over the semiconductor substrate;

forming in said semiconductor layer a drift region of the first conductivity type;

forming a first current electrode region of the first conductivity type in the semiconductor layer, extending from a first surface of the semiconductor layer, the semiconductor substrate forming a second current electrode region of the semiconductor device;

forming at least one floating region of a second conductivity type in the drift region; and

forming an injector device in the semiconductor layer, the injector device comprising an injector region of the second conductivity type formed in the semiconductor layer extending from the first surface, the injector device being arranged to inject charge carriers of the second conductivity type into the semiconductor layer and the at least one floating region in response to being activated by an activation signal.

14. A method of claim 13 , wherein the at least one floating region is electrically isolated from the first and second current electrode regions.

15. A method of claim 14 , further comprising:

forming a control electrode for controlling a flow of current through a channel between the first current electrode region and the second current electrode region; and

providing control circuitry for providing a control signal to the control electrode to turn the semiconductor device on and for providing the activation signal to the injector device in dependence on the provision of the control signal.

16. A method of claim 13 , wherein the semiconductor device is one of a unipolar device, a vertical semiconductor device, a MOSFET device and an IGBT device.

17. A method of claim 13 , further comprising forming a contact electrode coupled to the injector region for receiving the activation signal.

18. A method of claim 13 , further comprising:

forming a control electrode for controlling a flow of current through a channel between the first current electrode region and the second current electrode region; and

providing control circuitry for providing a control signal to the control electrode to turn the semiconductor device on and for providing the activation signal to the injector device in dependence on the provision of the control signal.

19. A method of claim 13 , comprising forming a semiconductor device comprising a plurality of base cells, each base cell comprising the first and second current electrode regions, a drift region and at least one floating region, and forming one or more injector devices in the semiconductor layer for the plurality of base cells.

20. The method of claim 13 , wherein the forming the at least one floating region of the second conductivity type in the drift region comprises:

forming the at least one floating region of the second conductivity type in the drift region, such that the at least one floating region and the drift region are depleted when the semiconductor device is off.

Assignments (31)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040632 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Sep 21, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 044209/0047 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040632/0001 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0793 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 024397/0001 →
SECURITY AGREEMENT Recorded Mar 15, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 024085/0001 →
SECURITY AGREEMENT Recorded May 19, 2009
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 022703/0405 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 18, 2009
From: RAYNES, JEAN-MICHEL; LANCE, PHILIPPE; STEFANOV, EVGUENIY; WEBER, YANN
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 022412/0215 →
Continuity (1)
Related Publication 20090267112A1 · Oct 29, 2009