Semiconductor device
View Patent ↗The semiconductor device includes an interconnect having a width of 0.1 μm or less and formed in an insulating layer constituted of a low relative dielectric constant film having a relative dielectric constant of 3.0 or lower, a via having a diameter of 0.1 μm or less and connected to the interconnect, and a dummy metal provided in the insulating layer. The dummy metal is located close to an end portion of the interconnect along an extension thereof, and the dummy metal and the interconnect are spaced by a distance of 0.3 μm or less.
1. A semiconductor device, comprising:
an interconnect formed extending along an extension direction in an insulating layer constituted of a low relative dielectric constant film having a relative dielectric constant equal to or lower than 3.0;
a via having a diameter equal to or less than 0.1 μm and connected to said interconnect; and
a dummy metal provided in said insulating layer, said dummy metal having a rectangular shaped, such that a length of said dummy metal along the extension direction is greater than a height of said dummy metal,
wherein said dummy metal is located close to an end portion of said interconnect along said extension direction, and
said dummy metal and said interconnect are spaced by a distance equal to or less than 0.3 μm.
2. The semiconductor device according to claim 1 , wherein said dummy metal has a floating potential.
3. The semiconductor device according to claim 1 , wherein said via is connected to said end portion of said interconnect.
4. The semiconductor device according to claim 1 , wherein said interconnect has a width equal to or less than 0.1 μm.
5. The semiconductor device according to claim 1 , wherein a face of said dummy metal opposing said end portion of said interconnect has a size equal to or larger than that of a face of said end portion of said interconnect opposing said dummy metal.
6. The semiconductor device according to claim 1 , wherein said insulating layer is essentially constituted of a porous film.
7. The semiconductor device according to claim 1 , wherein said dummy metal and said interconnect are essentially constituted of the same material.
8. The semiconductor device according to claim 1 , further comprising an upper level interconnect provided at an upper position from said interconnect; wherein said via serves to connect said interconnect and said upper level interconnect; and said via and said upper level interconnect include a structure formed through a dual Damascene process.
9. The semiconductor device according to claim 8 , wherein the dummy metal is spaced apart from an outermost edge of the upper level interconnect along the extension direction.
10. The semiconductor device according to claim 9 , wherein the upper level interconnect covers the dummy metal.