IP Library Granted Patent US 7,898,860
Granted Patent B2
US 7,898,860 · App. 12/543,035 · Granted Mar 1, 2011

Semiconductor memory device and method of controlling semiconductor memory device

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Quick Facts
Patent No.
US 7,898,860
App. No.
12/543,035
Granted
Mar 1, 2011
Kind
B2
Abstract

A semiconductor memory device has a nonvolatile memory cell to which data writing operation is limited to a predetermined logic value. In the case of rewriting data “10101010” written in a first memory core to data “01010101”, since the data writing operation includes writing of a logic value “1” opposite to the predetermined logic value, an erasing operation is needed and the data writing is regulated. By rewriting a pointer value stored in a pointer memory in place of performing the erasing operation, an operation of switching a memory core to be selected to a second memory core (data “11111111”) is performed. Data is newly written into the second memory core selected by the rewritten pointer value.

Claims (8)

1. A method of controlling a semiconductor memory device having plural memory cores each having nonvolatile memory cells in which data writing is regulated to a predetermined logic value, comprising the steps of,

at the time of selecting a setting value for setting an internal state from plural candidate values in a predetermined range,

preliminarily writing the plural candidate values in the plural memory cores, and

selecting the memory cores in an irreversible predetermined order and performing a reading operation on the selected memory core.

2. The method of controlling a semiconductor memory device according to claim 1 ,

wherein the device comprises the plural memory cores in which the same candidate value is written as at least one of the candidate values, and the method comprises:

a condition providing step of selecting the memory cores holding the candidate values different from each other in the irreversible predetermined order and conducting a test on the basis of the candidate value; and

a setting step of selecting the memory core having the same value as any one of the candidate values selected according to a result of the test and using the candidate value as the setting value.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036050/0174 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
CHANGE OF NAME Recorded Jul 22, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024748/0328 →