Method and apparatus for evaluating performance of a read channel
View Patent ↗Methods and apparatus are provided for measuring the performance of a read channel. A number of detection techniques, such as SOVA and maximum-a-posteriori (MAP) detectors, produce a bit decision and a corresponding reliability value associated with the bit decision. The reliability value associated with the bit decision may be expressed, for example, in the form of log likelihood ratios (LLRs). The reliability value can be monitored and used as a performance measure. The present invention provides a channel performance measure that generally correlates directly to the BER but can be collected in less time.
1. A reliability monitor apparatus for measuring performance in a read channel, comprising:
a counter for determining a number of occurrences of a reliability value in a plurality of ranges, wherein said reliability value is a measure of probability of a bit read on said read channel; and
a reliability value comparator circuit coupled to said counter, wherein said reliability value is based on one or more soft bit decisions and wherein said number of occurrences is provided to tune a channel and thereby improve a performance of said read channel, wherein said performance is based on said number of occurrences.
2. The reliability monitor of claim 1 , wherein said soft bit decision is obtained from a soft output Viterbi detector or a maximum-a-posteriori (MAP) detector.
3. The reliability monitor of claim 1 , wherein said soft bit decision, soft_value, is a normalized value between 0 and 1 indicating a probability for a detected bit having a given binary value of 0 or 1, and where a value of 0.5 denotes a lowest possible bit reliability, wherein said reliability value is computed as follows:
reliability_value=|soft_value−0.5|.
4. The reliability monitor of claim 1 , wherein said reliability value is based on a hard bit decision, hard_value, and a corresponding soft bit decision, soft_value, as follows:
reliability_value
=
soft_value
+
hard_value
-
1
2
.
5. The reliability monitor of claim 4 , wherein said hard bit decision is obtained from a bit-sequence generator.
6. The reliability monitor of claim 1 , wherein said number of occurrences is obtained by comparing said reliability value to a number of threshold values and counting said number of occurrences said reliability value is in each range defined by said thresholds.
7. The reliability monitor of claim 6 , wherein said thresholds are programmable.
8. The reliability monitor of claim 6 , further comprising means for generating one or more histograms based on one or more of said counted number of occurrences.
9. The reliability monitor of claim 1 , further comprising an accumulator to accumulate several samples of said reliability value.