IP Library Granted Patent US 8,697,492
Granted Patent B2
US 8,697,492 · App. 12/938,068 · Granted Apr 15, 2014

No flow underfill

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Quick Facts
Patent No.
US 8,697,492
App. No.
12/938,068
Granted
Apr 15, 2014
Kind
B2
Abstract

A method for making a microelectronic assembly includes providing a microelectronic element with first conductive elements and a dielectric element with second conductive elements. At least some of either the first conductive elements or the second conductive elements may be conductive posts and other of the first or second conductive elements may include a bond metal disposed between some of the conductive posts. An underfill layer may overly some of the first or second conductive elements. At least one of the first conductive elements may be moved towards the other of the second conductive elements so that the posts pierce the underfill layer and at least deform the bond metal. The microelectronic element and the dielectric element can be heated to join them together. The height of the posts above the surface may be at least forty percent of a distance between surfaces of the microelectronic element and dielectric element.

Claims (24)

1. A method for making a microelectronic assembly, comprising:

providing a microelectronic element having a first surface and first conductive elements projecting above the first surface, and a dielectric element having a second surface and second conductive elements projecting above the second surface, at least some of the first conductive elements or at least some of the second conductive elements being substantially rigid conductive posts, and the other of the first or second conductive elements including a bond metal juxtaposed with the at least some conductive posts, the posts having a height above the respective surface from which the posts project, and an underfill layer overlying at least some of the first conductive elements or at least some of the second conductive elements, the posts including tips having coplanar surfaces;

moving at least one of the first conductive elements towards the other of the second conductive elements such that the tips of the substantially rigid posts pierce the underfill layer and at least deform the bond metal; and

heating the microelectronic element and the dielectric element to a joining temperature until the bond metal flows along edges of the posts to contact the edges along at least one half the height of the posts and electrically joins the microelectronic element with the dielectric element,

wherein the height of the posts above the surface from which they project is at least forty percent of a distance between the first and second surfaces, and

wherein prior to the step of deforming the bond metal, trace amounts of the underfill layer are pushed into the bond metal by the conductive posts.

2. The method according to claim 1 , wherein the first conductive elements include the bond metal and the at least some conductive posts are second conductive elements of the dielectric element.

3. The method according to claim 1 , wherein the at least some posts are first conductive elements of the microelectronic element and the second conductive elements include the bond metal.

4. The method of claim 1 , wherein the step of moving at least one of the first conductive elements towards the other of the second conductive elements includes the substantially rigid posts piercing the bond metal.

5. The method of claim 1 , wherein the step of moving at least one of the first conductive elements toward the other of the second conductive elements includes penetrating the bond metal to a depth of at least 25% of a height of the bond metal above the respective one of the first or second surfaces.

6. The method of claim 1 , wherein at least some of the first conductive elements are substantially rigid posts.

7. The method of claim 1 , wherein at least some of the first conductive elements are conductive pads.

8. The method of claim 1 , wherein the underfill overlies the first conductive elements.

9. The method of claim 1 , wherein the underfill overlies the second conductive elements.

10. The method of claim 1 , wherein the underfill overlies the first and second conductive elements.

11. The method of claim 1 , wherein at least some of the first conductive elements are substantially rigid posts, and at least some of the second conductive elements are substantially rigid posts.

12. The method of claim 1 , wherein the posts are etched posts.

13. The method of claim 1 , wherein the step of moving occurs after the step of providing.

14. The method of claim 1 , wherein at least some of the second conductive elements are substantially rigid posts.

15. The method of claim 14 , wherein the step of providing includes providing a bond metal on the at least some of the substantially rigid posts.

16. The method of claim 1 , wherein at least some of the second conductive elements are contact pads.

17. The method of claim 16 , wherein the step of providing includes providing a bond metal on the at least some of the contact pads.

18. The method of claim 1 , wherein both the first conductive elements and the second conductive elements are substantially rigid posts.

19. The method of claim 18 , wherein tips of the first conductive elements and tips of the second conductive element are coplanar.

Assignments (7)
CHANGE OF NAME Recorded Nov 21, 2025
From: TESSERA LLC
To: ADEIA SEMICONDUCTOR SOLUTIONS LLC
Reel/Frame 073658/0816 →
CHANGE OF NAME Recorded Nov 21, 2025
From: TESSERA, INC.
To: TESSERA LLC
Reel/Frame 073658/0373 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2011
From: TESSERA RESEARCH LLC
To: TESSERA, INC.
Reel/Frame 026916/0054 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2011
From: HABA, BELGACEM; MOHAMMED, ILYAS; CHAU, ELLIS; LEE, SANG IL; DESAI, KISHOR
To: TESSERA RESEARCH LLC
Reel/Frame 025666/0252 →