IP Library Granted Patent US 8,269,335
Granted Patent B2
US 8,269,335 · App. 13/008,579 · Granted Sep 18, 2012

Multilayer semiconductor device and electronic equipment

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Quick Facts
Patent No.
US 8,269,335
App. No.
13/008,579
Granted
Sep 18, 2012
Kind
B2
Abstract

A multilayer semiconductor device includes an interconnect substrate provided with first electrode lands and connection terminals on a top surface; a semiconductor chip mounted on the top surface of the interconnect substrate; first connecting members connecting the first electrode lands to a circuit formation surface of the semiconductor chip; first metal posts provided on the connection terminals; encapsulating resin filling a space between the interconnect substrate and the semiconductor chip; a package provided with second electrode lands on a main surface; and second connecting members electrically connecting the first metal posts to the second electrode lands.

Claims (17)

1. A multilayer semiconductor device comprising:

an interconnect substrate provided with connection terminals on a top surface;

a semiconductor chip mounted on the top surface of the interconnect substrate;

first connecting members connecting the interconnect substrate to the semiconductor chip;

first metal posts provided on the connection terminals, and in a region of the top surface of the interconnect substrate outside the semiconductor chip when viewed from above; and

encapsulating resin filling at least a space between the interconnect substrate and the semiconductor chip;

wherein a distance between the semiconductor chip and the first metal posts is 0.1 mm or more.

2. The multilayer semiconductor device of claim 1 , wherein the encapsulating resin is provided in a region from the space between the interconnect substrate and the semiconductor chip to the first metal posts, and

part of a side surface of each of the first metal posts is exposed from the encapsulating resin.

3. The multilayer semiconductor device of claim 1 , further comprising first electrode lands provided on the top surface of the interconnect substrate, and the first electrode lands are connected to the first connecting members.

4. The multilayer semiconductor device of claim 3 ,

further comprising a semiconductor device provided with second electrode lands on a main surface; and

second connecting members electrically connecting the first metal posts to the second electrode lands.

5. The multilayer semiconductor device of claim 4 , wherein a circuit formation surface of the semiconductor chip faces the interconnect substrate.

6. The multilayer semiconductor device of claim 5 ,

further comprising second metal posts provided between the second connecting members and the second electrode lands,

wherein side surfaces of the second metal posts are exposed from the encapsulating resin.

Assignments (7)
CHANGE OF NAME Recorded Nov 19, 2025
From: TESSERA ADVANCED TECHNOLOGIES, INC.
To: ADEIA SEMICONDUCTOR ADVANCED TECHNOLOGIES INC.
Reel/Frame 073635/0304 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 25, 2016
From: PANNOVA SEMIC, LLC
To: TESSERA ADVANCED TECHNOLOGIES, INC.
Reel/Frame 037581/0466 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 7, 2015
From: PANASONIC CORPORATION
To: PANNOVA SEMIC, LLC
Reel/Frame 036065/0273 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2011
From: OSUMI, TAKATOSHI
To: PANASONIC CORPORATION
Reel/Frame 025868/0639 →