IP Library Granted Patent US 8,446,015
Granted Patent B2
US 8,446,015 · App. 13/015,072 · Granted May 21, 2013

Semiconductor device and method for manufacturing thereof

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Quick Facts
Patent No.
US 8,446,015
App. No.
13/015,072
Granted
May 21, 2013
Kind
B2
Abstract

A semiconductor device has a first semiconductor chip 10 molded with a resin 12 , a first metal 14 provided in the resin 12 in a circumference of the first semiconductor chip 10 , and being exposed on a lower surface of the resin 12 , a second metal 16 provided in the resin 12 over the first metal 14 , and being exposed on an upper surface of the resin 12 , and a first wire 18 coupling the first semiconductor chip 10 to the first metal 14 and the second metal 16 . The first wire 18 is coupled to the first metal 14 and the second metal 16 so as to be sandwiched therebetween.

Claims (28)

1. A semiconductor device comprising:

a first semiconductor chip molded with a resin;

a plurality of first metals provided in the resin in a circumference of the first semiconductor chip, and being exposed on a lower surface of the resin;

a plurality of second metals provided in the resin over the plurality of first metals, and being exposed on an upper surface of the resin, wherein the plurality of first metals and the plurality of second metals are in spherical shapes;

a first wire coupling the first semiconductor chip to a first one of the pluralities of first metals and second metals; wherein the first wire is coupled to the first one of the pluralities of first metals and second metals so as to be sandwiched therebetween;

a second semiconductor chip provided directly on the first semiconductor chip, and molded with the resin; and

a second wire coupling the second semiconductor chip to a second one of the pluralities of first metals and second metals; wherein the second wire is coupled to the second one of the pluralities of first metals and second metals so as to be sandwiched therebetween.

2. The semiconductor device according to claim 1 further comprising a plurality of first semiconductor chips and a plurality of second semiconductor chips, wherein adjacent first semiconductor chips of the plurality of first semiconductor chips are coupled to each other with a plurality of respective first wires, and wherein adjacent second semiconductor chips of the plurality of second semiconductor chips are coupled to each other with a plurality of respective second wires.

3. The semiconductor device according to claim 2 further comprising a first conductor between adjacent first semiconductor chips and a second conductor between adjacent second semiconductor chips, the adjacent first semiconductor chips coupled to each other with the plurality of respective first wires via the first conductor, and the adjacent second semiconductor chips coupled to each other with the plurality of respective second wires via the second conductor.

4. The semiconductor device according to claim 1 , wherein the resin is an epoxy resin.

5. The semiconductor device according to claim 1 , wherein the pluralities of first metals and second metals each comprise copper plated with gold.

6. The semiconductor device according to claim 1 , wherein the first wire comprises gold.

7. The semiconductor device according to claim 1 further comprising a plurality of second semiconductor chips provided on a plurality of first semiconductor chips, wherein adjacent first semiconductor chips of the plurality of first semiconductor chips are coupled to each other with a plurality of respective first wires, and wherein adjacent second semiconductor chips of the plurality of second semiconductor chips are coupled to each other with a plurality of respective second wires.

8. The semiconductor device according to claim 7 further comprising a first conductor between adjacent first semiconductor chips and a second conductor between adjacent second semiconductor chips, the adjacent first semiconductor chips coupled to each other with the plurality of respective first wires via the first conductor and the adjacent second semiconductor chips coupled to each other with the plurality of respective second wires via the second conductor.

9. A semiconductor device comprising:

a first semiconductor chip molded with a first resin and a second semiconductor chip molded with a second resin;

a first metal provided in the first resin in a circumference of the first semiconductor chip, and being exposed on a lower surface of the first resin;

a second metal provided in the second resin in a circumference of the second semiconductor chip, and being exposed on a lower surface of the second resin;

a third metal provided in the first resin over the first metal, and being exposed on an upper surface of the first resin;

a fourth metal provided in the second resin over the second metal, and being exposed on an upper surface of the second resin, wherein the first metal, second metal, third metal, and fourth metal are in spherical shapes;

a first wire coupling the first semiconductor chip to the first metal and the third metal, wherein the first wire is coupled to the first metal and the third metal so as to be directly sandwiched therebetween; and

a second wire coupling the second semiconductor chip to the second metal and the fourth metal, wherein the second wire is coupled to the second metal and the fourth metal so as to be directly sandwiched therebetween, wherein the first semiconductor chip molded with the first resin and the second semiconductor chip molded with the second resin are in a stacked configuration with the second metal of the second semiconductor chip coupled to the third metal of the first semiconductor chip via a solder layer.

10. The semiconductor device according to claim 9 , further comprising:

a third semiconductor chip provided on the first semiconductor chip, and molded with the first resin; and

a third wire coupling the third semiconductor chip to the first metal and the third metal, wherein the third wire is coupled to the first metal and the third metal so as to be sandwiched therebetween.

11. The semiconductor device according to claim 9 , further comprising:

a fourth semiconductor chip provided on the second semiconductor chip, and molded with the second resin; and

a fourth wire coupling the fourth semiconductor chip to the second metal and the fourth metal, wherein the fourth wire is coupled to the second metal and the fourth metal so as to be sandwiched therebetween.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036055/0276 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
SECURITY AGREEMENT Recorded Aug 23, 2012
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 028837/0076 →