IP Library Granted Patent US 8,900,993
Granted Patent B2
US 8,900,993 · App. 13/052,865 · Granted Dec 2, 2014

Semiconductor device sealed in a resin section and method for manufacturing the same

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Quick Facts
Patent No.
US 8,900,993
App. No.
13/052,865
Granted
Dec 2, 2014
Kind
B2
Abstract

A semiconductor device includes a first semiconductor chip having a pad electrode formed on an upper surface thereof; a resin section sealing the first semiconductor chip with the upper surface and a side surface of the first semiconductor chip being covered and a lower surface of die first semiconductor chip being exposed; a columnar electrode communicating between the upper surface and the lower surface of the resin section with the upper surface and the lower surface of the columnar electrode being exposed on the resin section and at least a part of the side surface of the columnar electrode being covered; and a bonding wire connecting the pad electrode and the columnar electrode with a part of the bonding wire being embedded in the columnar electrode as one end of the bonding wire being exposed on the lower surface of the columnar electrode and the remaining part of the bonding wire being covered with the resin section, and a method for manufacturing the same.

Claims (22)

1. A method for manufacturing a semiconductor device, comprising:

providing on a supporting plate a first semiconductor chip having a pad electrode formed on an upper surface thereof;

connecting the pad electrode and an upper surface of the supporting plate using a bonding wire;

forming on the supporting plate a columnar electrode with a portion of a length of the bonding wire being embedded therein, wherein one end of the bonding wire is exposed on a lower surface of the columnar electrode;

sealing the first semiconductor chip, the columnar electrode and a remaining portion of the length of the bonding wire with a resin section, and exposing an upper surface of the columnar electrode, wherein the upper surface of the columnar electrode is co-planar with an upper surface of the resin section;

removing the supporting plate; and

separating the first semiconductor chip by cutting the resin section along the first semiconductor chip.

2. The method according to claim 1 , wherein a side surface of the columnar electrode is surrounded by the resin section.

3. The method according to claim 1 , wherein an outer surface of the columnar electrode is exposed on the resin section.

4. The method according to claim 1 , further comprising forming a metal film on the upper surface and the lower surface of the columnar electrode.

5. The method of claim 4 , wherein the metal film comprises a nickel layer and a gold layer.

6. The semiconductor device according to claim 1 , further comprising bonding a second semiconductor chip flip-chip on the first semiconductor chip with a lower surface and a side surface of the second semiconductor chip being covered with the resin section and an upper surface of the second semiconductor chip being exposed on the resin section.

7. The semiconductor device according to claim 1 , wherein the columnar electrode is made of copper or solder.

8. The semiconductor device according to claim 1 , wherein the first semiconductor chip is provided in plurality and such first semiconductor chips are stacked so as to superpose the columnar electrodes for the first semiconductor chips above and below.

9. The method of claim 1 , wherein cutting the resin section further comprises exposing side surfaces of the columnar electrode.

10. The method of claim 9 , wherein the columnar electrode is configured to electrically connect to the first semiconductor chip either from the upper surface, the lower surface, or one of the side surfaces of the columnar electrode.

11. The method of claim 1 , wherein cutting the resin section further comprises leaving the side surfaces of the columnar electrode sealed with the resin section.

12. The method of claim 11 , wherein strength of the resin section is maintained.

13. The method of claim 1 , wherein the columnar electrode is configured to couple an upper surface of the resin section to a lower surface of the resin section.

14. The method of claim 1 , wherein the resin section is formed by disposing the supporting plate in a mold and by hot pressing.

15. The method of claim 1 , wherein the resin section is formed by spin coating a resin in liquid form and by heating.

16. The method of claim 1 , wherein the columnar electrode is electrically connected with the first semiconductor chip, wherein the columnar electrode is exposed on an upper surface and a lower surface of the resin section.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN INTELLECTUAL PROPERTY Recorded Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
SECURITY AGREEMENT Recorded Aug 23, 2012
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 028837/0076 →