IP Library Granted Patent US 8,908,383
Granted Patent B1
US 8,908,383 · App. 13/476,923 · Granted Dec 9, 2014

Thermal via structures with surface features

Inventors: Tarak A. Railkar (Plano, TX); Paul D. Bantz (Los Altos, CA)
Assignee: TriQuint Semiconductor, Inc.
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Quick Facts
Patent No.
US 8,908,383
App. No.
13/476,923
Granted
Dec 9, 2014
Kind
B1
Abstract

Embodiments of the present disclosure describe apparatuses, methods, and systems of thermal via structures with surface features. In some embodiments the surface features may have dimensions greater than approximately one micron. The thermal via structures may be incorporated into a substrate of an integrated circuit device. Other embodiments may be described and/or claimed.

Claims (38)

1. An apparatus comprising:

a substrate comprising a first surface and a second surface opposite the first surface;

an electronic component coupled with the first surface of the substrate;

a circuit board coupled with the second surface of the substrate; and

a thermal via structure disposed in the substrate, the thermal via structure including a thermally conductive material that includes surface features on the first surface and the second surface and arranged in a pattern of two or more partially overlapping shapes, the surface features having dimensions greater than approximately 1 micron, wherein the surface features on the first surface are in direct contact with the electronic component and configured to transfer heat sourced from the electronic component when operating to the circuit board.

2. The apparatus of claim 1 , wherein the pattern comprises two or more partially overlapping square shapes.

3. The apparatus of claim 1 , wherein the pattern comprises two or more partially overlapping triangle shapes.

4. The apparatus of claim 1 , wherein the pattern comprises two or more partially overlapping sawtooth shapes.

5. The apparatus of claim 1 , wherein the pattern comprises two or more partially overlapping arc shapes.

6. The apparatus of claim 1 , wherein the thermal via structure comprises a minor cross-sectional dimension and the dimensions of the features are parallel with the minor cross-sectional dimension.

7. The apparatus of claim 1 , wherein the thermal via structure comprises copper, silver, or a thermally-conductive epoxy.

8. The apparatus of claim 1 , wherein the thermal via structure further comprises:

a side surface located between the first surface and the second surface, wherein the surface features are integrated into the side surface of the thermal via structure.

9. The apparatus of claim 6 , wherein the dimensions are first dimensions and the thermal via structure further comprises a major cross-sectional dimension, and the features further include second dimensions that are parallel to the major cross-sectional dimension.

10. The apparatus of claim 9 , wherein the first dimensions are in a range of approximately 1-30 microns.

11. The apparatus of claim 9 , wherein the first dimensions are greater than approximately 10 microns and the second dimensions are greater than approximately 20 microns.

12. The apparatus of claim 10 , wherein the second dimensions are in a range of approximately 1-60 microns.

13. A method comprising:

providing a substrate comprising a first surface and a second surface opposite the first surface;

coupling an electronic component with the first surface of the substrate;

coupling a circuit board with the second surface of the substrate;

forming a cavity in the substrate, the cavity having a pattern of two or more partially overlapping shapes; and

forming a thermal via structure within the cavity, wherein the thermal via structure is formed with surface features on the first surface of the substrate and the second surface of the substrate, the surface features on the first surface arranged in the pattern and having dimensions greater than approximately 1 micron, wherein the surface features on the first surface are in direct contact with the electronic component and configured to transfer heat sourced from the electronic component when operating to the circuit board.

14. The method of claim 13 , wherein forming the thermal via structure further comprises:

plating copper in the cavity.

15. The method of claim 13 , wherein forming the cavity comprises:

forming the cavity by laser drilling, mechanical drilling, etching, photoresist, or punching.

16. The method of claim 13 , wherein the two or more partially overlapping shapes include two or more partially overlapping arc shapes, square shapes, sawtooth shapes, or triangle shapes.

17. A system comprising:

a transceiver configured to provide a radio frequency (RF) signal;

a power amplification module configured to receive the RF signal from the transceiver and amplify the RF signal for an over-the-air transmission; and

an integrated circuit (IC) device, disposed in the transceiver or in the PA module, the IC device including;

a substrate comprising a first surface and a second surface opposite the first surface;

an electronic component coupled with the first surface of the substrate;

a circuit board coupled with the second surface of the substrate; and

a thermal via structure disposed in the substrate, the thermal via structure including a thermally conductive material that includes surface features on the first surface and the second surface and arranged in a pattern of two or more partially overlapping shapes, the surface features having dimensions greater than approximately 1 micron, wherein the surface features on the first surface are in direct contact with the electronic component and configured to transfer heat sourced from the electronic component when operating to the circuit board.

18. The system of claim 17 , wherein the surface features include dimensions greater than approximately 1 micron.

19. The system of claim 17 , wherein the dimensions are greater than approximately 10 microns.

Assignments (2)
MERGER Recorded Jun 16, 2016
From: TRIQUINT SEMICONDUCTOR, INC.
To: QORVO US, INC.
Reel/Frame 039050/0193 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 23, 2012
From: RAILKAR, TARAK A.; BANTZ, PAUL D.
To: TRIQUINT SEMICONDUCTOR, INC.
Reel/Frame 028259/0313 →