Method for designing a semiconductor device including stress films
A method for designing a semiconductor device includes arranging at least a pattern of a first active region in which a first transistor is formed and a pattern of a second active region in which a second transistor is formed; arranging at least a pattern of a gate wire which intersects the first active region and the second active region; extracting at least a first region in which the first active region and the gate wire are overlapped with each other; arranging at least one pattern of a compressive stress film on a region including the first active region; and obtaining by a computer a layout pattern of the semiconductor device, when the at least one pattern of the compressive stress film is arranged, end portions of the at least one pattern thereof are positioned based on positions of end portions of the first region.
1. A semiconductor device comprising:
first active regions provided in a semiconductor substrate;
second active regions provided in the semiconductor substrate;
gate wires which intersect the first active regions and the second active regions;
first transistors which are provided on the first active regions and which include first gate electrodes, each of which is a part of each gate wire;
second transistors which are provided on the second active regions and which include second gate electrodes, each of which is a part of each gate wire;
at least one compressive stress film which is provided on a region including the first active regions and which covers the first transistors; and
a tensile stress film which is provided on a region including the second active regions adjacent to the compressive stress film and which covers the second transistors,
wherein the distances in a longitudinal direction of the gate wires from end portions of first regions in which the first active regions and the gate wires are overlapped with each other to end portions of the at least one compressive stress film are set to a first value,
wherein the at least one compressive stress film is surrounded by the tensile stress film,
wherein the at least one compressive stress film includes a projective portion at a portion where the at least one compressive stress film is contact with the tensile stress film.
2. The semiconductor device according to claim 1 , wherein a space between one first active region and another first active region adjacent thereto in the longitudinal direction of the gate wires is set two or more times the first value, one compressive stress film is arranged on a region including the one first active region, another compressive stress film is arranged on a region including the another first active region, and the tensile stress film is provided between the one compressive stress film and the another compressive stress film.
3. The semiconductor device according to claim 1 , wherein the projective portion projects from an upper surface of the tensile stress film.
4. A semiconductor device comprising:
first active regions provided in a semiconductor substrate;
second active regions provided in the semiconductor substrate;
gate wires which intersect the first active regions and the second active regions;
first transistors which are provided on the first active regions and which include first gate electrodes, each of which is a part of each gate wire;
second transistors which are provided on the second active regions and which include second gate electrodes, each of which is a part of each gate wire;
at least one compressive stress film which is provided on a region including the first active regions and which covers the first transistors; and
a tensile stress film which is provided on a region including the second active regions adjacent to the compressive stress film and which covers the second transistors,
wherein the distances in a longitudinal direction of the gate wires from end portions of first regions in which the first active regions and the gate wires are overlapped with each other to end portions of the at least one compressive stress film are set to a first value,
wherein a space between one first active region and another first active region adjacent thereto in the longitudinal direction of the gate wires is set two or more times the first value, one compressive stress film is arranged on a region including the one first active region, another compressive stress film is arranged on a region including the another first active region, and the tensile stress film is provided between the one compressive stress film and the another compressive stress film.
5. The semiconductor device according to claim 4 , wherein the at least one compressive stress film includes a projective portion at a portion where the at least one compressive stress film is contact with the tensile stress film.
6. The semiconductor device according to claim 5 , wherein the projective portion projects from an upper surface of the tensile stress film.