IP Library Granted Patent US 9,214,932
Granted Patent B2
US 9,214,932 · App. 13/764,655 · Granted Dec 15, 2015

Body-biased switching device

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Quick Facts
Patent No.
US 9,214,932
App. No.
13/764,655
Granted
Dec 15, 2015
Kind
B2
Abstract

Embodiments provide a switching device including one or more field-effect transistors (FETs). In embodiments, a body-bias circuit may derive a bias voltage based on a radio frequency signal applied to a switch field-effect transistor and apply the bias voltage to the body terminal of the switch field-effect transistor.

Claims (66)

1. A circuit configured to switch radio-frequency (“RF”) signals, the circuit comprising:

a field-effect transistor (“FET”) including a source terminal, a gate terminal, a drain terminal, and a body terminal; and

a body-bias circuit coupled with the source terminal, the drain terminal and the body terminal, the body-bias circuit having a first circuit element coupled between the source terminal and the body terminal and a second circuit element coupled between the drain terminal and the body terminal, the first and second circuit elements to:

derive a negative bias voltage based on an RF signal through the first and second circuit elements; and

provide the negative bias voltage to the body terminal when the FET is in an off state.

2. The circuit of claim 1 , further comprising:

a plurality of FETs, including the FET, coupled in series with one another.

3. The circuit of claim 1 , wherein the FET is an n-type FET.

4. The circuit of claim 1 , wherein the body-bias circuit is only coupled with the source terminal, the drain terminal, and the body terminal.

5. The circuit of claim 1 , wherein the circuit comprises a silicon-on-insulator (“SOI”) circuit.

6. The circuit of claim 1 , wherein the FET is a first FET and the body-bias circuit comprises:

a node coupled with the body terminal,

wherein:

the first circuit element includes a second FET having:

a source terminal coupled with the source terminal of the first FET; and

a drain terminal coupled with the node; and

the second circuit element includes a third FET having:

a drain terminal coupled with the node; and

a source terminal coupled with the drain terminal of the first FET.

7. The circuit of claim 6 , wherein:

the second FET further includes a gate terminal coupled with the drain terminal of the first FET; and

the third FET further includes a gate terminal coupled with the source terminal of the first FET.

8. The circuit of claim 6 , wherein the first and second FETs are diode-connected FETs and:

the second FET further includes a gate terminal coupled with the node; and

the third FET further includes a gate terminal coupled with the node.

9. The circuit of claim 1 , wherein the body-bias circuit comprises:

a node coupled with the body terminal,

wherein:

the first circuit element includes a first diode coupled with the source terminal and the node; and

the second circuit element includes a second diode coupled with the drain terminal and the node.

10. The circuit of claim 9 , wherein:

the first diode includes a cathode terminal coupled with the source terminal and an anode terminal coupled with the node; and

the second diode includes a cathode terminal coupled with the drain terminal and an anode terminal coupled with the node.

11. The circuit of claim 1 , wherein the body-bias circuit is to derive the negative bias voltage by being configured to rectify the RF signal.

12. A wireless communication device comprising:

a transceiver;

an antenna; and

a radio frequency (“RF”) front-end coupled with the transceiver and the antenna and configured to communicate signals between the transceiver and the antenna, the radio frequency front-end including a silicon-on-insulator switching device that has:

a decoder configured to set a plurality of switch field-effect transistors (“FET”) in an off state or an on state; and

a cell with a field-effect transistor (“FET”) of the plurality of FETs and a body-bias circuit, wherein the body-bias circuit includes first and second circuit elements to provide a negative voltage to a body of the field-effect transistor when the FET is in an off-state, the negative voltage derived from an RF signal through the first and second circuit elements.

13. The wireless communication device of claim 12 , wherein the FET is a first FET and the body-bias circuit comprises:

a node coupled with a body terminal of the first FET,

wherein:

the first circuit element includes a second FET having: a source terminal coupled with a source terminal of the first FET; and a drain terminal coupled with the node; and

the second circuit element includes a third FET having: a drain terminal coupled with the node; and a source terminal coupled with the drain terminal of the first FET.

14. The wireless communication device of claim 13 , wherein:

the second FET further includes a gate terminal coupled with the drain terminal of the first FET; and

the third FET further includes a gate terminal coupled with the source terminal of the first FET.

15. A method comprising:

controlling, with a decoder circuit, a switch field-effect transistor (“FET”) to be in an off state;

deriving, with a body-bias circuit, a negative bias voltage based on a radio-frequency (“RF”) signal through first and second circuit elements of the body-bias circuit while the switch FET is in the off state; and

providing, by the body-bias circuit, the negative bias voltage to a body of the switch FET while the switch FET is in the off state.

16. The method of claim 15 , wherein deriving the negative bias voltage comprises:

rectifying the RF signal applied to the switch FET.

17. A circuit configured to switch radio-frequency (“RF”) signals, the circuit comprising:

a field-effect transistor (“FET”) including a source terminal, a gate terminal, a drain terminal, and a body terminal; and

a body-bias circuit having:

a node coupled with the body terminal;

a first resistor coupled with the drain terminal and the node; and

a second resistor coupled with the source terminal and the node,

wherein the body-bias circuit is configured to:

derive a bias voltage based on an RF signal through the first and second resistors; and

provide the bias voltage to the body terminal.

18. The circuit of claim 17 , wherein the first resistor and the second resistor are of equal size.

19. The circuit of claim 17 , wherein the body-bias circuit is configured to provide the bias voltage as a DC voltage of approximately zero volts.

20. The circuit of claim 17 , wherein the gate terminal of the FET is coupled with a decoder; and the drain terminal of the FET is not coupled with the decoder.

Assignments (2)
MERGER Recorded Jun 16, 2016
From: TRIQUINT SEMICONDUCTOR, INC.
To: QORVO US, INC.
Reel/Frame 039050/0193 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 11, 2013
From: CLAUSEN, WILLIAM J.; FURINO, JAMES P., JR.; YORE, MICHAEL D.
To: TRIQUINT SEMICONDUCTOR, INC.
Reel/Frame 029792/0589 →