IP Library Granted Patent US 9,122,344
Granted Patent B2
US 9,122,344 · App. 13/940,516 · Granted Sep 1, 2015

Method and apparatus for parallel scanning and data processing for touch sense arrays

Inventors: Andriy Yarosh (Moguliv-Podilskiy, UA); Roman Ogirko (Lviv, UA); Oleksandr Pirogov (Lviv, UA); Victor Kremin (Lviv, UA); Roman Sharamaga (Lviv, UA); Anton Konovalov (Khmelnitsky, UA); Andriy Maharyta (Lviv, UA); Haneef Mohammed (Beaverton, OR)
G06F3/0416G06F9/3851
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Quick Facts
Patent No.
US 9,122,344
App. No.
13/940,516
Granted
Sep 1, 2015
Kind
B2
Abstract

Methods and apparatus include receiving a current set of measurements of a touch sense array using a first functional block of a processing device and processing the current set of measurements using a second functional block to render a touch map corresponding to the touch sense array. The methods and apparatus include performing the next set of measurements using the first functional block. Performing the next set of measurements and processing the current set of measurement are performed substantially concurrently.

Claims (33)

1. A method comprising:

receiving a current set of measurements of a touch sense array using a first functional block of a processing device;

processing the current set of measurements using a second functional block to render a touch map corresponding to the touch sense array; and

performing a next set of measurements of the touch sense array using the first functional block,

wherein the performing the next set of measurements and processing the current set of measurements are performed substantially concurrently.

2. The method of claim 1 , wherein the first functional block is a sequencer and is not part of a central processing unit (CPU) of the processing device.

3. The method of claim 1 , wherein the second functional block is a digital filter block (DFB) of the processing device and is not part of a central processing unit (CPU) of the processing device.

4. The method of claim 3 , further comprising storing data, corresponding to individual slots of response signals of the current or next set of measurements, in corresponding buffers.

5. The method of claim 4 , further comprising combining the data stored in the buffers into combined data to be stored in a full sense array raw data buffer in order of slots.

6. The method of claim 5 , further comprising directly transferring the combined data in the full sense array raw data buffer to memory using direct memory access (DMA).

7. The method of claim 1 , wherein the second functional block is a software thread of the CPU of the processing device.

8. The method of claim 1 , wherein the first functional block is a first software thread of a central processing unit (CPU) of the processing device and the second functional block is a second software thread of the CPU.

9. The method of claim 1 , wherein the processing the current set of measurements is initiated in response to receiving an interrupt corresponding to completion of receiving the current set of measurements.

10. The method of claim 1 , wherein the performing the next set of measurements is initiated in response to receiving an interrupt corresponding to completion of processing of the current set of measurements.

11. A circuit comprising:

a first functional block configured to receive a current set of measurements of a touch sense array and configured to perform a next set of measurements of the touch sense array; and

a second functional block configured to process the current set of measurements to render a touch map corresponding to the touch sense array,

wherein the next set of measurements is performed by the first functional block substantially concurrently with the second functional block processing the current set of measurements.

12. The circuit of claim 11 , wherein the first functional block is a sequencer and is not part of a central processing unit (CPU).

13. The circuit of claim 11 , wherein the second functional block is a digital filter block (DFB) of a processing device and is not part of a central processing unit (CPU).

14. The circuit of claim 11 , wherein the first functional block and the second functional block share at least one common hardware element.

15. The circuit of claim 11 , further comprising a central processing unit (CPU) configured to initiate processing the current set of measurements in response to an interrupt corresponding to completion of receiving the current set of measurements from the first functional block.

16. The circuit of claim 11 , further comprising a central processing unit (CPU) configured to initiate processing the next set of measurements in response to an interrupt corresponding to completion of receiving the current set of measurements from the first functional block.

17. The circuit of claim 11 , further comprising:

a memory; and

a direct memory access (DMA) controller coupled to the memory and the first functional block, wherein the DMA controller is configured to transfer data corresponding to individual response signals of the current or next set of measurements to corresponding buffers in the memory.

18. The circuit of claim 17 , wherein the DMA controller is further configured to combine the buffers into a full sense array raw data buffer in order of slots in the memory.

19. An apparatus, comprising:

a processing device configured to detect a conductive object proximate to a touch sense array, wherein the processing device comprises:

a first functional block configured to receive a current set of measurements of a touch sense array and configured to perform a next set of measurements of the touch sense array; and

a second functional block configured to process the current set of measurements to render a touch map corresponding to the touch sense array,

wherein the next set of measurements is performed by the first functional block substantially concurrently with the second functional block processing the current set of measurements.

20. The apparatus of claim 19 , wherein the first functional block and the second functional block are part of a central processing unit (CPU) of the processing device, wherein the receiving the current set of measurements and the performing the next set of measurements comprises executing a first software thread of the CPU, and wherein the processing the current set of measurements comprises processing the current set of measurements using a second software thread of the CPU.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 10, 2014
From: YAROSH, ANDRIY; SHARAMAGA, ROMAN; KONOVALOV, ANTON; MAHARYTA, ANDRIY; OGIRKO, ROMAN; PIROGOV, OLEKSANDR; KREMIN, VICTOR; MOHAMMED, HANEEF D
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 032397/0446 →
PATENT SECURITY AGREEMENT Recorded Nov 14, 2013
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 031636/0105 →
Continuity (3)
Continuation 13247550 · Sep 28, 2011
Provisional Application 61512358 · Jul 27, 2011
Related Publication 20140118296A1 · May 1, 2014