Semiconductor device with STI and method for manufacturing the semiconductor device
A semiconductor device includes: a semiconductor substrate having first and second areas; an STI isolation region being made of an isolation trench formed in the semiconductor substrate and an insulating film burying the isolation trench and defining a plurality of active regions in the first and second areas; a first structure formed on an area from the active region in the first area to a nearby STI isolation region and having a first height; and a second structure formed on an area from the active region in the second area to a nearby STI isolation region and having a second height, wherein the surface of the said STI isolation region in the first area is lower than the surface of said STI isolation region in the second area.
1. A semiconductor device comprising:
a semiconductor substrate including a memory cell area and a logic circuit area;
an isolation trench formed in the semiconductor substrate, the isolation trench defining a first active region in the memory cell area and a second active region in the logic circuit area;
an insulating film formed in the isolation trench and including a step between the first active region and the second active region;
a floating gate formed on the first active region and the insulating film in an area nearby the first active region;
an inter-gate insulating film formed on the floating gate;
a control gate formed on the inter-gate insulating film; and
a gate electrode formed on the second active region and the insulating film in an area nearby the second active region,
wherein a height from a surface of the first active region to a surface of the insulating film in the memory cell area is smaller than a height from a surface of the second active region to a surface of the insulating film in the logic circuit area,
the surface of the insulating film in the logic circuit area is higher than the surface of the second active region, and
an edge of the floating gate is located on the insulating film and between the step and the first active region.
2. The semiconductor device according to claim 1 , further comprising:
a first gate insulating film formed on the first active region and having a first thickness;
a second gate insulating film formed on the second active region and having a second thickness which is different from the first thickness.
3. The semiconductor device according to claim 2 , further comprising:
a first concave portion formed in the insulating film near a boundary between the first active region and the insulating film; and
a second concave portion formed in the insulating film near a boundary between the second active region and the insulating film.
4. The semiconductor device according to claim 3 , wherein:
a depth of the first concave portion from the surface of the first active region is smaller than a depth of the second concave portion from the surface of the second active region.
5. The semiconductor device according to claim 1 , further comprising:
a dummy floating gate formed on the step and including a same material as a material of the floating gate.
6. The semiconductor device according to claim 5 , further comprising:
a dummy inter-gate insulating film partially formed on the dummy floating gate and made of a same material as a material of the inter-gate insulating film; and
a dummy control gate formed on the dummy inter-gate insulating film and the dummy floating gate and made of a same material as a material of the control gate.
7. The semiconductor device according to claim 1 , wherein the memory cell area is located adjacent to the logic circuit area.