IP Library Granted Patent US 8,958,653
Granted Patent B2
US 8,958,653 · App. 14/157,577 · Granted Feb 17, 2015

Image coding method, image coding apparatus, image decoding method and image decoding apparatus

Inventors: Hisao Sasai (Osaka, JP); Takahiro Nishi (Nara, JP); Youji Shibahara (Osaka, JP); Toshiyasu Sugio (Osaka, JP); Kyoko Tanikawa (Osaka, JP); Toru Matsunobu (Osaka, JP); Kengo Terada (Osaka, JP)
Assignee: Panasonic Intellectual Property Corporation of America
H04N19/00763G06T9/00
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Quick Facts
Patent No.
US 8,958,653
App. No.
14/157,577
Granted
Feb 17, 2015
Kind
B2
Abstract

An apparatus is provided for decoding last position information indicating a horizontal position and a vertical position of a last non-zero coefficient in a predetermined order within a current block to be decoded, the current block being included in a picture and including a plurality of coefficients. The apparatus includes one or more processors, a communication unit, and storage coupled to the one or more processors and the communication unit. The communication unit is configured to transmit a request for a bitstream to an external system, and receive the bitstream from the external system. The one or more processors are configured to obtain the bitstream, perform first arithmetic decoding, perform second arithmetic decoding, derive a horizontal component of the last position information, and derive a vertical component of the last position. A system for decoding and a displaying method are also provided.

Claims (38)

1. An apparatus for decoding last position information indicating a horizontal position and a vertical position of a last non-zero coefficient in a predetermined order within a current block to be decoded, the current block being included in a picture and including a plurality of coefficients, the apparatus comprising:

one or more processors;

a communication unit; and

storage coupled to the one or more processors and the communication unit;

wherein the communication unit is configured to:

transmit a request for a bitstream to an external system; and

receive the bitstream from the external system; and

wherein the one or more processors are configured to:

obtain the bitstream including a first partial signal, a second partial signal, a third partial signal, and a fourth partial signal, in this order;

perform first arithmetic decoding on a first partial signal and a third partial signal, respectively, to obtain a decoded first partial signal and a decoded third partial signal, wherein in the first arithmetic decoding, decoding is performed on the third partial signal when the first partial signal indicates a greater value than a predetermined value;

perform second arithmetic decoding on a second partial signal and a fourth partial signal, respectively, to obtain a decoded second partial signal and a decoded fourth partial signal, the second arithmetic decoding being different from the first arithmetic decoding, wherein in the second arithmetic decoding, decoding is performed on the fourth partial signal when the second partial signal indicates a greater value than the predetermined value;

derive a horizontal component of the last position information indicating the horizontal position of the non-zero coefficient from the decoded first partial signal and the decoded third partial signal; and

derive a vertical component of the last position information indicating the vertical position of the non-zero coefficient from the decoded second partial signal and the decoded fourth partial signal.

2. A system for decoding last position information indicating a horizontal position and a vertical position of a last non-zero coefficient in a predetermined order within a current block to be decoded, the current block being included in a picture and including a plurality of coefficients, the system comprising:

a first apparatus;

a second apparatus coupled to the first apparatus; and

a display coupled to the second apparatus;

wherein the first apparatus is configured to perform operations for transmitting a request for a bitstream to an external apparatus and letting the second apparatus receive the bitstream;

wherein the second apparatus includes:

one or more processors; and

storage coupled to the one or more processors, the one or more processors being configured to perform operations for:

obtaining the bitstream including a first partial signal, a second partial signal, a third partial signal, and a fourth partial signal, in this order;

performing first arithmetic decoding on a first partial signal and a third partial signal, respectively, to obtain a decoded first partial signal and a decoded third partial signal, wherein in the first arithmetic decoding, decoding is performed on the third partial signal when the first partial signal indicates a greater value than a predetermined value;

performing second arithmetic decoding on a second partial signal and a fourth partial signal, respectively, to obtain a decoded second partial signal and a decoded fourth partial signal, the second arithmetic decoding being different from the first arithmetic decoding, wherein in the second arithmetic decoding, decoding is performed on the fourth partial signal when the second partial signal indicates a greater value than the predetermined value;

deriving a horizontal component of the last position information indicating the horizontal position of the non-zero coefficient from the decoded first partial signal and the decoded third partial signal;

deriving a vertical component of the last position information indicating the vertical position of the non-zero coefficient from the decoded second partial signal and the decoded fourth partial signal; and

generating a reconstructed picture of the current block;

wherein the display is configured to display the reconstructed picture.

3. A displaying method using a communication system, the displaying method comprising:

transmitting a request for a bitstream including an encoded picture;

receiving the bitstream from an external apparatus through a network;

obtaining a bitstream including a first partial signal, a second partial signal, a third partial signal, and a fourth partial signal, in this order;

performing first arithmetic decoding on a first partial signal and a third partial signal, respectively, to obtain a decoded first partial signal and a decoded third partial signal, wherein in the first arithmetic decoding, decoding is performed on the third partial signal when the first partial signal indicates a greater value than a predetermined value;

performing second arithmetic decoding on a second partial signal and a fourth partial signal, respectively, to obtain a decoded second partial signal and a decoded fourth partial signal, the second arithmetic decoding being different from the first arithmetic decoding, wherein in the second arithmetic decoding, decoding is performed on the fourth partial signal when the second partial signal indicates a greater value than the predetermined value;

deriving a horizontal component of a last position information indicating a horizontal position of a non-zero coefficient which is last in a predetermined order, from the decoded first partial signal and the decoded third partial signal;

deriving a vertical component of a last position information indicating a vertical position of the non-zero coefficient, from the decoded second partial signal and the decoded fourth partial signal;

generating a reconstructed picture of the current block; and

displaying the reconstructed picture.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2016
From: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
To: SUN PATENT TRUST
Reel/Frame 038299/0213 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2014
From: PANASONIC CORPORATION
To: PANASONIC INTELLECTUAL PROPERTY CORPORATION OF AMERICA
Reel/Frame 033033/0163 →
Continuity (3)
Continuation 13669690 · Nov 6, 2012
Provisional Application 61556406 · Nov 7, 2011
Related Publication 20140133562A1 · May 15, 2014