Low noise amplifier drain switch circuit

1. A low noise amplifier (LNA) drain switch circuit comprising:

a first field effect transistor (FET) with a first gate contact, a first source contact, and a first drain contact;

a second FET with a second gate contact, a second source contact, and a second drain contact, wherein the second gate contact is coupled with the first drain contact and the second drain contact is coupled with the second gate contact through a resistor; and

a diode coupled with the second source contact.

2. The LNA drain switch circuit of claim 1 , wherein the first gate contact is to receive a switch control voltage of a switch.

3. The LNA drain switch circuit of claim 2 , wherein the switch control voltage is a negative voltage or a voltage at or near zero volts.

4. The LNA drain switch circuit of claim 1 , wherein the LNA drain switch circuit is an LNA drain switch circuit of a monolithic microwave integrated circuit (MMIC).

5. The LNA drain switch circuit of claim 4 , wherein the LNA drain switch circuit is coupled with an LNA in a receive path of the MMIC.

6. The LNA drain switch circuit of claim 4 , wherein the MMIC is a Gallium Nitride (GaN) or Gallium Arsenide (GaAs) MMIC.

7. The LNA drain switch circuit of claim 1 , wherein the diode is a first diode and further comprising a second diode coupled in series with the first diode.

8. The LNA drain switch circuit of claim 1 , wherein the drain voltage supply is to receive a positive voltage.

9. A system comprising:

a drain voltage supply;

a control voltage supply; and

an integrated circuit (IC) coupled with the drain voltage supply and the control voltage supply, the IC comprising:

a low noise amplifier (LNA);

a first field effect transistor (FET) with a first gate contact coupled with the control voltage supply, and a first drain contact coupled with the drain voltage supply through a resistor;

a second FET with a second gate contact coupled with the first drain contact, a second drain contact coupled with the drain voltage supply, and a source contact coupled with the LNA; and

a diode electrically coupled with and positioned between the source contact and the LNA.

10. The system of claim 9 , further comprising a switch coupled with the LNA and the control voltage supply, wherein the control voltage supply is to provide a control voltage to the switch.

11. The system of claim 9 , wherein the IC is a monolithic microwave integrated circuit (MMIC).

12. The system of claim 11 , wherein the MMIC is a Gallium Nitride (GaN) MMIC.

13. The system of claim 11 , wherein the LNA is in a receive path of the MMIC.

14. The system of claim 13 , further comprising a power amplifier (PA) in a transmit path of the MMIC.

15. The system of claim 9 , wherein the diode is a first diode and further comprising a second diode coupled between the first diode and the LNA.

16. A method comprising:

coupling a first drain contact of a first FET to a gate contact of a second FET;

coupling a second drain contact of the second FET to the gate contact of the second FET through a resistor;

coupling a source contact of the second FET to a diode; and

coupling the diode to a low noise amplifier (LNA).

17. The method of claim 16 , wherein the LNA is an LNA of a gallium nitride (GaN) monolithic microwave integrated circuit (MMIC).

18. The method of claim 17 , wherein the LNA is an LNA of a receive path of the GaN MMIC.

19. The method of claim 17 , wherein the gate contact is a second gate contact, and further comprising receiving, on a first gate contact of the first FET, a switch control voltage related to a switch coupled with the LNA.

20. The method of claim 16 , wherein the diode is a first diode and further comprising coupling a second diode between the first diode and the LNA.