Deep trench isolation structures and systems and methods including the same
View Patent ↗Deep trench isolation structures and systems and methods including the same are disclosed herein. The systems include a semiconductor device. The semiconductor device includes a semiconductor body, a device region, and the deep trench isolation structure. The deep trench isolation structure is configured to electrically isolate the device region from other device regions that extend within the semiconductor body. The deep trench isolation structure includes an isolation trench, a dielectric material that extends within the isolation trench, a first semiconducting region, and a second semiconducting region. The methods include methods of manufacturing a semiconductor device that includes the disclosed deep trench isolation structures. The methods also include methods of operating an integrated circuit device that includes a plurality of semiconductor devices that include the disclosed deep trench isolation structures.
1. A method of forming a semiconductor device, the method comprising:
forming a first semiconducting region of a first conductivity type within a semiconductor body of the first conductivity type, wherein
(i) the first semiconducting region has a first dopant concentration,
(ii) the semiconductor body has a body dopant concentration and a body surface, and
(iii) a device region of the semiconductor device separates the first semiconducting region from the body surface;
forming a second semiconducting region of the first conductivity type within the semiconductor body, wherein
(i) the second semiconducting region has a second dopant concentration, and
(ii) the second semiconducting region separates the device region from the first semiconducting region;
forming an isolation trench that extends into the semiconductor body from the body surface and that further extends around the device region; and
locating a dielectric material within the isolation trench;
wherein the first dopant concentration is greater than the body dopant concentration, and further wherein the first dopant concentration is greater than the second dopant concentration.
2. The method of claim 1 , wherein the method further comprises:
forming a third semiconducting region of a second conductivity type that is opposite the first conductivity type within the semiconductor body, wherein the third semiconducting region has a third dopant concentration and separates the second semiconducting region from the device region;
forming a fourth semiconducting region of the second conductivity type within the semiconductor body, wherein the fourth semiconducting region has a fourth dopant concentration and separates the third semiconducting region from the device region; and
forming a fifth semiconducting region of the second conductivity type within the semiconductor body, wherein the fifth semiconducting region has a fifth dopant concentration and extends between the body surface and the fourth semiconducting region;
wherein the fourth dopant concentration is greater than the third dopant concentration.
3. The method of claim 1 , wherein the forming the isolation trench comprises forming the isolation trench such that the isolation trench extends through the first semiconducting region and through the second semiconducting region.
4. The method of claim 1 , wherein the method further comprises:
locating an electrically conductive body within the isolation trench, wherein the dielectric material extends between the electrically conductive body and the semiconductor body and electrically isolates the electrically conductive body from the semiconductor body.
5. The method of claim 4 , wherein the method further comprises:
forming an electrical connection to the electrically conductive body, wherein the electrical connection is configured to at least one of
(i) permit grounding of the electrically conductive body, and
(ii) permit an electrical potential to be conveyed to the electrically conductive body.
6. The method of claim 1 , wherein:
the semiconductor device is a first semiconductor device of an integrated circuit device;
the device region is a first device region of the first semiconductor device;
the integrated circuit device further comprises a second device region of a second semiconductor device that is adjacent to the first device region;
the forming the first semiconducting region comprises forming the first semiconducting region such that both the first device region and the second device region separate the first semiconducting region from the body surface;
the forming the second semiconducting region comprises forming the second semiconducting region such that the second semiconducting region separates the first semiconducting region from both the first device region and the second device region; and
the forming the isolation trench comprises forming such that the isolation trench extends between and in contact with the first device region and the second device region.