IP Library Granted Patent US 9,325,357
Granted Patent B2
US 9,325,357 · App. 14/469,916 · Granted Apr 26, 2016

Wireless communication unit, integrated circuits and method for linearizing a transmitter signal

Inventors: Youri Volokhine (Stevensbeek, NL); Jeffrey Kevin Jones (Chandler, AZ)
Assignee: FREESCALE SEMICONDUCTOR, INC.
H04B1/0475H03F1/3247H03F3/195H03F3/245H03F2200/129H03F2201/3224H04B2001/0425H04B2001/0433
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Quick Facts
Patent No.
US 9,325,357
App. No.
14/469,916
Granted
Apr 26, 2016
Kind
B2
Abstract

A wireless communication unit comprising a transmitter comprises: a linearization circuit arranged to receive and digitally distort an input signal; a radio frequency power amplifier operably coupled to the linearization circuit and arranged to amplify a radio frequency representation of the digitally distorted input signal; a feedback path arranged to feed back a portion of the amplified digitally distorted output of the received input signal to the linearization circuit; a bypass circuit comprising a plurality of energy storage elements operably coupled between an output of the radio frequency power amplifier and ground; and a first connector arranged to provide a representation of at least one electrical memory effect of at least one of the plurality of energy storage elements to the linearization circuit, wherein the linearization circuit is arranged to use the representation of the at least one electrical memory effect when digitally distorting the input signal.

Claims (41)

1. A wireless communication unit, comprising:

a transmit chain for providing an RF signal to an antenna, the transmit chain comprising:

a linearization circuit arranged to receive and digitally distort an input signal;

a radio frequency power amplifier operably coupled to the linearization circuit and arranged to amplify a radio frequency representation of the digitally distorted input signal and output at an radio frequency power amplifier output the RF signal to the antenna;

a feedback path arranged to feed back a portion of the amplified digitally distorted output of the received input signal to the linearization circuit;

a bypass circuit comprising a plurality of energy storage elements operably coupled between an output of the radio frequency power amplifier and ground; and

a first connector arranged to provide a representation of at least one electrical memory effect of the at least one of the plurality of energy storage elements to the linearization circuit, wherein the linearization circuit is arranged to use the representation of the at least one electrical memory effect when digitally distorting the input signal.

2. The wireless communication unit of claim 1 , wherein the plurality of energy storage elements comprise at least one from a group of: a bypass inductor, an envelope decoupling capacitor.

3. The wireless communication unit of claim 2 , further comprising a dampening resistor located between the bypass inductor and the envelope decoupling capacitor and arranged to mask the at least one of the electrical memory effect of the decoupling capacitance.

4. The wireless communication unit of claim 3 , wherein the dampening resistor is a voltage controlled variable resistor.

5. The wireless communication unit of claim 4 , wherein the voltage controlled variable resistor is operably coupled to a processor arranged to increase a resistance value of the voltage controlled variable resistor when an input envelope signal is present close to a low-frequency resonance value of at least one of the plurality of energy storage elements.

6. The wireless communication unit of claim 4 , wherein the voltage controlled variable resistor is implemented in a digital front end.

7. The wireless communication unit of claim 3 , further comprising a current sensor operably coupled to the dampening resistor and the linearization circuit and arranged to determine a current passing through the at least one of the plurality of energy storage elements.

8. The wireless communication unit of claim 7 , wherein the current sensor is a hall-effect current sensor located atop or below the dampening resistor.

9. The wireless communication unit of claim 7 , wherein the current sensor is arranged to determine a value and a direction of an envelope current flowing through at least one of the plurality of energy storage elements.

10. The wireless communication unit of claim 9 , wherein the current sensor comprises two clamped field effect transistors arranged to enable current to flow in both directions.

11. The wireless communication unit of claim 1 , wherein the linearization circuit is a digital predistortion circuit arranged to distort the input signal according to the at least one electrical memory effect of the at least one of the plurality of energy storage elements located in or coupled to the power amplifier.

12. The wireless communication unit of claim 1 , wherein the bypass circuit forms part of the power amplifier such that the linearization circuit is arranged to use the representation of the electrical memory effect when digitally distorting the input signal taking into account electrical memory effects from within the power amplifier.

13. A radio frequency integrated circuit, comprising:

a radio frequency power amplifier operably coupled to a linearization circuit and arranged to amplify a radio frequency representation of a digitally distorted input signal;

a feedback path arranged to feed back a portion of the amplified digitally distorted output of the received input signal to the linearization circuit;

a bypass circuit comprising a plurality of energy storage elements operably coupled between an output of the radio frequency power amplifier and ground; and

a first connector arranged to provide a representation of at least one electrical memory effect of at least one of the plurality of energy storage elements to the linearization circuit, such that the linearization circuit uses the representation of the at least one electrical memory effect when digitally distorting the input signal received by the radio frequency power amplifier.

14. A baseband integrated circuit for a transmit chain, comprising:

a linearization circuit arranged to receive an input signal and digitally distort the received input signal to produce a digitally distorted output signal;

an input arranged to receive:

a fed back portion of an amplified digitally distorted representation of the digitally distorted output signal from a power amplifier of the transmitter; and

a representation of at least one electrical memory effect of at least one of a plurality of energy storage elements located within a bypass circuit located between an output of the power amplifier and ground;

wherein the linearization circuit is arranged to use the representation of the at least one electrical memory effect when digitally distorting the input signal.

15. A method for linearizing a transmitter signal, the method comprising:

receiving at a transmitter an input signal and digitally distorting the input signal;

amplifying a radio frequency representation of the digitally distorted input signal;

feeding back a portion of the amplified digitally distorted output of the received input signal to a linearization circuit;

determining at least one electrical memory effect of at least one of a plurality of energy storage elements located within transmitter bypass circuit located between an output of a power amplifier and ground;

providing a representation of the at least one electrical memory effect of the at least one of the plurality of energy storage elements to the linearization circuit; and

using, by the linearization circuit, the representation of the at least one electrical memory effect of the at least one of the plurality of energy storage elements when digitally distorting the input signal.

16. The wireless communication unit of claim 5 , wherein the voltage controlled variable resistor is implemented in a digital front end.

17. The wireless communication unit of claim 4 , further comprising a current sensor operably coupled to the dampening resistor and the linearization circuit and arranged to determine a current passing through at least one of the plurality of energy storage elements.

18. The wireless communication unit of claim 5 , further comprising a current sensor operably coupled to the dampening resistor and the linearization circuit and arranged to determine a current passing through the at least one of the plurality of energy storage elements.

19. The wireless communication unit of claim 6 , further comprising a current sensor operably coupled to the dampening resistor and the linearization circuit and arranged to determine a current passing through the at least one of the plurality of energy storage elements.

20. The wireless communication unit of claim 8 , wherein the current sensor is arranged to determine a value and a direction of an envelope current flowing through the at least one of the plurality of energy storage elements.

Assignments (15)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0460 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 7, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037458/0502 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037357/0921 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 034160/0351 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 034160/0370 →
SUPPLEMENT TO IP SECURITY AGREEMENT Recorded Nov 4, 2014
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 034153/0027 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2014
From: VOLOKHINE, YOURI; JONES, JEFFREY KEVIN
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 033619/0436 →
Continuity (1)
Related Publication 20160065250A1 · Mar 3, 2016