Method of improving FPGA security using authorization codes
A method for securely programming a population of authorized FPGAs includes defining the population of authorized FPGAs, generating an encrypted configuration bitstream for the population of authorized FPGAs, generating an individual Authorization Code for each FPGA in the population of authorized FPGAs, feeding the individual Authorization Codes into the FPGAs in the population of FPGAs, feeding the encrypted configuration bitstream into all of the FPGAs in the population of FPGAs, and in each FPGA using the Authorization Code to decrypt the encrypted configuration bitstream to program the FPGA.
1. A method for securely programming a population of authorized FPGAs comprising:
defining the population of authorized FPGAs, each FPGA containing a unique device serial number and a unique factory key created at the time of manufacture of the FPGA;
generating a single encrypted configuration bitstream for the population of authorized FPGAs using a single bitstream encryption key that is not known by any of the FPGAs;
generating an individual authorization code for each FPGA in the population of authorized FPGAs, each authorization code generated outside the FPGA using both the unique factory key associated with the unique device serial number of one of the FPGA devices and the single bitstream encryption key;
feeding each individual authorization code into the FPGA in the population of FPGAs having the serial number associated with the unique factory key used to generate the authorization code;
feeding the encrypted configuration bitstream into all of the FPGAs in the population of FPGAs;
in each FPGA using the authorization code and the unique factory key to extract the bitstream key to decrypt the encrypted configuration bitstream; and
using the decrypted configuration bitstream to program the FPGA.
2. The method of claim 1 further comprising deleting the authorization code and the keying material in each FPGA in the population of FPGAs after it has been used to decrypt the bitstream.
3. The method of claim 1 wherein different encryption keys and authorization codes are used for different sections of the configuration bitstream.
4. The method of claim 3 wherein the configuration bitstreams fed into a single FPGA comprise multiple encrypted bitstream sections, each section being associated with its own authorization code.
5. The method of claim 4 wherein one section of the configuration bitstreams is common to a population of FPGAs, and another section is not.
6. The method of claim 1 wherein the individual authorization code for each FPGA in the population of authorized FPGAs transports a key used for authenticating the bitstream.