IP Library Granted Patent US 9,337,278
Granted Patent B1
US 9,337,278 · App. 14/631,677 · Granted May 10, 2016

Gallium nitride on high thermal conductivity material device and method

Inventors: Xing Gu (Plano, TX); Jinqiao Xie (Allen, TX); Edward A. Beam, III (Plano, TX); Deep C. Dumka (Richardson, TX); Cathy C. Lee (Allen, TX)
Assignee: TriQuint Semiconductor, Inc.
H01L29/2003H01L21/0254H01L21/4803H01L23/367H01L23/3732H01L24/32H01L24/83H01L29/205H01L29/66462H01L29/7787H01L2224/32225H01L2224/83192
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Quick Facts
Patent No.
US 9,337,278
App. No.
14/631,677
Granted
May 10, 2016
Kind
B1
Abstract

Embodiments include but are not limited to semiconductor devices including a barrier layer, a gallium nitride channel layer having a Ga-face coupled with the barrier layer, and a thermoconductive layer having a thermal conductivity of at least 500 W/(m·K) within 1000 nanometers of a Ga-face of the gallium nitride channel layer. The semiconductor device may be a high-electron-mobility transistor or a semiconductor wafer. Methods for making the same also are described.

Claims (37)

1. A semiconductor component comprising:

a barrier layer;

a gallium nitride (GaN) channel layer having a Ga-face coupled with the barrier layer; and

a thermoconductive layer within 1000 nanometers of the Ga-face of the GaN channel layer, wherein the thermoconductive layer has a thermal conductivity value of at least 500 W/(m·K) and is closer to an N-face of the GaN channel layer than to the Ga-face of the GaN channel layer.

2. The semiconductor component of claim 1 , further comprising:

a dielectric layer between the GaN channel layer and the thermoconductive layer.

3. The semiconductor component of claim 1 , further comprising:

a thermoconductive carrier mounting layer coupled with the thermoconductive layer, wherein the thermoconductive carrier mounting layer has a thermal conductivity value of at least 500 W/(m·K).

4. The semiconductor component of claim 1 , further comprising:

a GaN cap layer, wherein the GaN cap layer is coupled with the barrier layer.

5. The semiconductor component of claim 4 , further comprising:

a back barrier layer between the GaN channel layer and the thermoconductive layer.

6. The semiconductor component of claim 5 , further comprising a dielectric layer between the back barrier layer and the thermoconductive layer.

7. The semiconductor component of claim 6 , further comprising an activation layer coupled with a Ga-face of the GaN cap layer, the activation layer including a gate, a source, and a drain.

8. The semiconductor component of claim 7 , further comprising a thermoconductive carrier mounting layer coupled with the thermoconductive layer, wherein the thermoconductive carrier mounting layer has a thermal conductivity value of at least 500 W/(m·K).

9. The semiconductor component of claim 8 , wherein the thermoconductive layer and the thermoconductive carrier mounting layer are formed of a diamond based material.

10. The semiconductor component of claim 1 , wherein the thermoconductive layer is within 500 nanometers of the Ga-face of the GaN channel layer.

11. A method of fabricating a semiconductor component comprising:

forming an N-face barrier layer;

forming an N-face gallium nitride (GaN) channel layer on the N-face barrier layer; and

forming a thermoconductive layer within 1000 nanometers of the N-face GaN channel layer, wherein the thermoconductive layer has a thermal conductivity of at least 500 W/(m·K).

12. The method of claim 11 , further comprising before forming the N-face barrier layer, forming an N-face GaN cap layer, wherein the N-face barrier layer is formed on the N-face GaN cap layer.

13. The method of claim 12 , further comprising:

providing a substrate;

forming an N-face nucleation layer on the substrate before forming the N-face GaN cap layer;

forming an N-face buffer layer on the N-face nucleation layer, wherein the N-face GaN cap layer is formed above the N-face buffer layer; and

removing the substrate, N-face nucleation layer, and N-face buffer layer to expose a Ga-face of the N-face GaN cap layer.

14. The method of claim 12 , further comprising forming a dielectric layer on the N-face GaN channel layer, wherein forming the thermoconductive layer includes forming the thermoconductive layer on the dielectric layer.

15. The method of claim 12 , further comprising forming an activation layer on a Ga-face of the N-face GaN cap layer, the activation layer including a gate, a source, and a drain.

16. The method of claim 12 , wherein the thermoconductive layer is formed of diamond, boron nitride, graphene, graphite, or cubic boron arsenide.

17. The method of claim 13 , further comprising forming a release layer on the N-face buffer layer, wherein forming the N-face GaN cap layer above the N-face nucleation layer includes forming the N-face GaN cap layer on the release layer, and wherein removing the substrate, N-face nucleation layer, and N-face buffer layer includes etching the release layer.

18. The method of claim 13 , further comprising forming a dielectric layer above the N-face GaN channel layer, wherein forming the thermoconductive layer includes forming the thermoconductive layer on the dielectric layer.

19. The method of claim 13 , wherein the thermoconductive layer is formed of diamond, the N-face nucleation layer is formed of aluminum nitride (AlN), and the N-face buffer layer is formed of GaN.

20. The method of claim 17 , further comprising forming a back barrier layer on the N-face GaN channel layer.

21. The method of claim 20 , further comprising forming a dielectric layer on the back barrier layer, wherein forming the thermoconductive layer includes forming the thermoconductive layer on the dielectric layer.

22. The method of claim 21 , further comprising coupling a thermoconductive carrier mounting layer to the thermoconductive layer, wherein the thermoconductive carrier mounting layer has a thermal conductivity of at least 500 W/(m·K).

23. The method of claim 22 , further comprising forming an activation layer on the Ga-face of the N-face GaN cap layer, the activation layer including a gate, a source, and a drain.

Assignments (2)
MERGER Recorded Jun 16, 2016
From: TRIQUINT SEMICONDUCTOR, INC.
To: QORVO US, INC.
Reel/Frame 039050/0193 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 26, 2015
From: GU, XING; XIE, JINQIAO; BEAM, EDWARD A., III; DUMKA, DEEP C.; LEE, CATHY C.
To: TRIQUINT SEMICONDUCTOR, INC.
Reel/Frame 035042/0781 →