SOLID STATE NANOPORE DEVICES AND METHODS OF MANUFACTURE
Solid state nanopore devices for nanopore applications and methods of manufacture are disclosed herein. The method includes forming a membrane layer on an underlying substrate. The method further includes forming a hole in the membrane layer. The method further comprises plugging the hole with a sacrificial material. The method further includes forming a membrane over the sacrificial material. The method further includes removing the sacrificial material within the hole and portions of the underlying substrate. The method further includes drilling an opening in the membrane, aligned with the hole.
1 . A method, comprising:
forming a membrane layer on an underlying semiconductor substrate;
forming a hole in the membrane layer;
plugging the hole with a sacrificial plug;
forming a membrane over the sacrificial plug;
removing the sacrificial plug and portions of the underlying semiconductor substrate; and
drilling an opening in the membrane, aligned with the hole, after the sacrificial plug and portions of the underlying semiconductor substrate have been removed.
2 . The method of claim 1 , further comprising:
forming an optional sacrificial material over the sacrificial plug; and
forming the membrane directly over a top surface of the optional sacrificial material.
3 . The method of claim 2 , wherein the optional sacrificial material is a same material as used for the sacrificial plug.
4 . The method of claim 2 , further comprising:
removing portions of the optional sacrificial material,
wherein the membrane remains directly over remaining portions of the optional sacrificial material during the removing step.
5 . The method of claim 4 , wherein the removing of the portions of the optional sacrificial material forms an air gap between the membrane layer and the membrane.
6 . The method of claim 1 , wherein the membrane layer and the membrane are both SiNx, and
wherein the membrane layer is formed to a thickness of about 20 nm to 500 nm using low-pressure chemical vapor deposition (LPCVD) processes and the membrane has a thickness of about 10 nm.
7 . The method of claim 1 , wherein the opening is about 5 nm in diameter, suspended over the hole in the membrane layer.
8 . The method of claim 1 , wherein a sacrificial material is blanketed deposited to a thickness greater than a depth of the hole and is thereafter planarized to form the sacrificial plug.
9 . A method, comprising:
forming a membrane layer on an underlying semiconductor substrate;
forming a hole in the membrane layer;
plugging the hole with a sacrificial material, wherein the sacrificial material is blanketed deposited to a thickness greater than a depth of the hole and is thereafter planarized to form a sacrificial plug;
forming a membrane over the sacrificial plug;
removing the sacrificial plug within the hole and portions of the underlying semiconductor substrate; and
drilling an opening in the membrane, aligned with the hole, after the sacrificial plug and portions of the underlying semiconductor substrate have been removed.
10 . The method of claim 9 , further comprising:
forming an optional sacrificial material over the sacrificial plug; and
forming the membrane directly over a top surface of the optional sacrificial material.
11 . The method of claim 10 , wherein the optional sacrificial material is a same material as used for the sacrificial plug.
12 . The method of claim 10 , further comprising:
removing portions of the optional sacrificial material,
wherein the membrane remains directly over remaining portions of the optional sacrificial material during the removing step.
13 . The method of claim 12 , wherein the removing of the portions of the optional sacrificial material forms an air gap between the membrane layer and the membrane.