Surge protection element and semiconductor device
View Patent ↗A semiconductor element is provided which does not break down by avalanche current. A surge protection element includes: a semiconductor multi-layer comprising a nitride semiconductor; a first p-type semiconductor and a second p-type semiconductor which are disposed above the semiconductor multi-layer; a first electrode disposed above the first p-type semiconductor; and a second electrode disposed above the second p-type semiconductor.
1. A surge protection element comprising:
a substrate;
a semiconductor multi-layer disposed above the substrate, the semiconductor multi-layer including a channel and comprising a nitride semiconductor;
a first p-type semiconductor layer and a second p-type semiconductor layer which are disposed above the semiconductor multi-layer;
a first electrode disposed above the first p-type semiconductor layer; and
a second electrode disposed above the second p-type semiconductor layer.
2. The surge protection element according to claim 1 , further comprising:
a first ohmic electrode disposed above the semiconductor multi-layer;
a second ohmic electrode disposed above the semiconductor multi-layer; and
a first resistance,
wherein the first p-type semiconductor layer is disposed between the first ohmic electrode and the second p-type semiconductor layer,
the second p-type semiconductor layer is disposed between the first p-type semiconductor layer and the second ohmic electrode, and
the first ohmic electrode is electrically connected to the first electrode via the first resistance, and the second ohmic electrode is electrically connected to the second electrode.
3. The surge protection element according to claim 1 , further comprising:
a first ohmic electrode disposed above the semiconductor multi-layer;
a second ohmic electrode disposed above the semiconductor multi-layer; and
a first diode including the first electrode as an anode and the first ohmic electrode as a cathode,
wherein the first p-type semiconductor layer is disposed between the first ohmic electrode and the second p-type semiconductor layer,
the second p-type semiconductor layer is disposed between the first p-type semiconductor layer and the second ohmic electrode,
the first ohmic electrode is electrically connected to the first electrode via the first diode, and
the second ohmic electrode is electrically connected to the second electrode.
4. The surge protection element according to claim 2 , further comprising:
a first diode including the first electrode as an anode and the first ohmic electrode as a cathode,
wherein the first ohmic electrode is electrically connected to the first electrode via the first diode, and
the first diode is connected in parallel with the first resistance.
5. The surge protection element according to claim 2 , further comprising:
a second resistance,
wherein the second ohmic electrode is electrically connected to the second electrode via the second resistance.
6. The surge protection element according to claim 4 , further comprising:
a second resistance; and
a second diode including the second ohmic electrode as a cathode and the second electrode as an anode,
wherein the second ohmic electrode is electrically connected to the second electrode via the second resistance, and the second ohmic electrode is electrically connected to the second electrode via the second diode.
7. A semiconductor device comprising:
the surge protection element according to claim 1 ; and
a nitride semiconductor transistor including a source electrode, a drain electrode, and a gate electrode which are disposed above the semiconductor multi-layer,
wherein the source electrode is electrically connected to the first electrode of the surge protection element, and
the drain electrode is electrically connected to the second electrode of the surge protection element.
8. A semiconductor device comprising:
the surge protection element according to claim 2 ; and
a nitride semiconductor transistor including a source electrode, a drain electrode, and a gate electrode which are disposed above the semiconductor multi-layer,
wherein the source electrode is electrically connected to the first ohmic electrode of the surge protection element, and
the drain electrode is electrically connected to the second ohmic electrode of the surge protection element.
9. The semiconductor device according to claim 8 , wherein the first resistance includes a portion of the first p-type semiconductor layer.
10. The semiconductor device according to claim 8 , wherein the first resistance includes a portion of the semiconductor multi-layer.
11. The semiconductor device according to claim 8 , wherein the first resistance includes a portion of a metal film.
12. A semiconductor device comprising:
the surge protection element according to claim 3 ; and
a nitride semiconductor transistor including a source electrode, a drain electrode, and a gate electrode which are disposed above the semiconductor multi-layer,
wherein the source electrode is electrically connected to the first ohmic electrode of the surge protection element, and
the drain electrode is electrically connected to the second ohmic electrode of the surge protection element.
13. The semiconductor device according to claim 12 , wherein the first diode includes a portion of the first p-type semiconductor and a portion of the semiconductor multi-layer.
14. The semiconductor device according to claim 12 , wherein the first diode includes a schottky electrode and a portion of the semiconductor multi-layer.
15. The semiconductor device according to claim 7 , further comprising a p-type semiconductor layer disposed between the semiconductor multi-layer and the gate electrode.
16. A semiconductor device comprising:
the surge protection element according to claim 1 ; and
a nitride semiconductor bidirectional switch including a third ohmic electrode, a fourth ohmic electrode, a third gate electrode, and a fourth gate electrode which are disposed above the semiconductor multi-layer,
wherein the third ohmic electrode is electrically connected to the first electrode, and
the fourth ohmic electrode is electrically connected to the second electrode.
17. A semiconductor device comprising:
the surge protection element according to claim 5 ; and
a nitride semiconductor bidirectional switch including a third ohmic electrode, a fourth ohmic electrode, a third gate electrode, and a fourth gate electrode which are disposed above the semiconductor multi-layer,
wherein the third ohmic electrode is electrically connected to the first ohmic electrode, and
the fourth ohmic electrode is electrically connected to the second ohmic electrode.
18. The semiconductor device according to claim 17 , further comprising:
a third p-type semiconductor layer disposed between the semiconductor multi-layer and the third gate electrode; and
a fourth p-type semiconductor layer disposed between the semiconductor multi-layer and the fourth gate electrode.
19. The surge protection element according to claim 1 , wherein a current flows through the second electrode and the first electrode in this order, when a voltage of the second electrode is greater than a voltage of the first electrode by a predetermined voltage or more.
20. The surge protection element according to claim 19 , wherein the predetermined voltage is set by a distance between an end of the first p-type semiconductor layer on the second p-type semiconductor layer side and an end of the second p-type semiconductor layer on the first p-type semiconductor layer side.