IP Library Granted Patent US 9,431,925
Granted Patent B2
US 9,431,925 · App. 14/800,739 · Granted Aug 30, 2016

Half bridge circuit, full bridge circuit constructed with half bridge circuit, and three-phase inverter circuit constructed with half bridge circuit

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Quick Facts
Patent No.
US 9,431,925
App. No.
14/800,739
Granted
Aug 30, 2016
Kind
B2
Abstract

In a half bridge circuit according to one aspect of the present disclosure, when a voltage between a first terminal and a third terminal or a voltage between the first terminal and the second terminal is greater than or equal to a threshold voltage, a current is passed from the second terminal to the third terminal or from the third terminal to the second terminal according to a polarity of the voltage between the second terminal and the third terminal. When the current is passed from the third terminal to the second terminal, the voltage between the second terminal and the third terminal changes with respect to the voltage applied between the first terminal and the third terminal within a range where the voltage between the first terminal and the third terminal is less than or equal to the threshold voltage.

Claims (32)

1. A half bridge circuit comprising:

an upper arm;

a lower arm; and

a control circuit that controls the upper arm and the lower arm,

wherein

the upper arm includes a first switch element,

the lower arm includes a second switch element,

the first switch element and the second switch element are a semiconductor element including a first terminal that controls a current and a second terminal and a third terminal that input and output the current,

when a voltage between the first terminal and the third terminal or a voltage between the first terminal and the second terminal is greater than or equal to a threshold voltage, the current is passed from the second terminal to the third terminal or from the third terminal to the second terminal in accordance with a polarity of the voltage between the second terminal and the third terminal,

when the current is passed from the third terminal to the second terminal, the voltage between the second terminal and the third terminal changes with respect to the voltage applied between the first terminal and the third terminal within a range where the voltage between the first terminal and the third terminal is less than or equal to the threshold voltage,

when the second switch element is turned off, the voltage between the first terminal and the third terminal of the second switch element is switched to a substantial zero voltage or a negative bias voltage, and

before the first switch element is turned off, the voltage between the first terminal and the third terminal of the second switch element is switched from the negative bias voltage to the substantial zero voltage.

2. The half bridge circuit according to claim 1 , further comprising:

an output terminal that is of a connection point of the upper arm and the lower arm and that outputs an output voltage; and

a load which is connected to the output terminal and in which a load current passes by application of the output voltage,

wherein

in the load, a frequency response of the load current is delayed with respect to the output voltage,

the load has a feature that the load current passes only in one direction of the load irrespective of switching operation of the output voltage, and

before the first switch element is turned on, the voltage between the first terminal and the third terminal of the second switch element is switched from the substantial zero voltage to the negative bias voltage.

3. The half bridge circuit according to claim 1 , further comprising:

an output terminal that is of a connection point of the upper arm and the lower arm and that outputs an output voltage; and

a load which is connected to the output terminal and in which a load current passes by application of the output voltage,

wherein

the load has a resonant frequency which is lower than a switching frequency of the output voltage, and has a feature that a phase of the load current is delayed with respect to the output voltage,

when the first switch element is turned off, the voltage between the first terminal and the third terminal of the first switch element is switched to a substantial zero voltage or a negative bias voltage, and

the voltage applied between the first terminal and the third terminal of the first switch element is switched to the negative bias voltage before the first switch element is turned off.

4. The half bridge circuit according to claim 1 , wherein the first switch element is a heterojunction field effect transistor including:

a semiconductor layered body that is made of a nitride semiconductor formed on a semiconductor substrate;

a drain terminal and a source terminal that are formed on the layered body while separated from each other; and

a gate terminal that is formed between the drain terminal and the source terminal.

5. A full bridge circuit constituted of two half bridge circuits according to claim 1 .

6. A three-phase inverter circuit constituted of three half bridge circuits according to claim 1 .

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 4, 2025
From: INFINEON TECHNOLOGIES AUSTRIA AG
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 072853/0508 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 6, 2024
From: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
To: PANASONIC HOLDINGS CORPORATION
Reel/Frame 069503/0625 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2015
From: TAMAOKA, SHUJI
To: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
Reel/Frame 036406/0668 →