DEVICES AND METHODS OF FORMING FINFETS WITH SELF ALIGNED FIN FORMATION
Devices and methods for forming semiconductor devices with FinFETs are provided. One method includes, for instance: obtaining an intermediate semiconductor device with a substrate and at least one shallow trench isolation region; depositing a hard mask layer over the intermediate semiconductor device; etching the hard mask layer to form at least one fin hard mask; and depositing at least one sacrificial gate structure over the at least one fin hard mask and at least a portion of the substrate. One intermediate semiconductor device includes, for instance: a substrate with at least one shallow trench isolation region; at least one fin hard mask over the substrate; at least one sacrificial gate structure over the at least one fin hard mask; at least one spacer disposed on the at least one sacrificial gate structure; and at least one pFET region and at least one nFET region grown into the substrate.
1 . An intermediate semiconductor device comprising:
a substrate with at least one shallow trench isolation region;
at least one fin hard mask over the substrate;
at least one sacrificial gate structure over the at least one fin hard mask;
at least one spacer disposed adjacent to the at least one sacrificial gate structure; and
at least one pFET region and at least one nFET region grown into the substrate.
2 . The device of claim 1 , wherein the at least one spacer comprises:
a first spacer positioned adjacent to the at least one sacrificial gate structure; and
a second spacer positioned adjacent to the first spacer.
3 . The device of claim 1 , further comprising:
a flowable oxide layer disposed over the substrate.
4 . The device of claim 3 , wherein a portion of the at least one sacrificial gate structure and a portion of the at least one fin hard mask are removed to form at least one opening between the at least one spacer.
5 . The device of claim 4 , further comprising:
at least one fin formed in the at least one opening.
6 . The device of claim 5 , further comprising:
a barrier layer over the flowable oxide layer and each side of the at least one opening.
7 . The device of claim 6 , further comprising:
an oxide filling a space between the barrier layer in the at least one opening.
8 . The device of claim 5 , further comprising:
an inner side wall spacer disposed on at least one side wall of the at least one opening adjacent to the at least one spacer.
9 . The device of claim 8 , wherein the inner side wall spacer has a varying thickness forming a wider opening at a top of the at least one opening and a narrower opening at a bottom of the at least one opening.
10 . The device of claim 8 , further comprising:
a gate deposition material over the at least one fin and between the inner side wall spacer.
11 . The device of claim 10 , wherein the gate deposition material comprises:
a dielectric layer.
12 . The device of claim 11 , wherein the gate deposition material further comprising:
at least one gate material.
13 . The device of claim 5 , further comprises:
a gate material over the at least one fin.
14 . The device of claim 13 , wherein the gate material comprises:
a dielectric layer.
15 . The device of claim 14 , wherein the gate material further comprises:
at least one gate material.
16 . The device of claim 5 , wherein a portion of the at least one fin is replaced with a high mobility material.