Data processing method, precoding method, and communication device
An encoder outputs a first bit sequence having N bits. A mapper generates a first complex signal s 1 and a second complex signal s 2 with use of bit sequence having X+Y bits included in an input second bit sequence, where X indicates the number of bits used to generate the first complex signal s 1 , and Y indicates the number of bits used to generate the second complex signal s 2 . A bit length adjuster is provided after the encoder, and performs bit length adjustment on the first bit sequence such that the second bit sequence has a bit length that is a multiple of X+Y, and outputs the first bit sequence after the bit length adjustment as the second bit sequence. As a result, a problem between a codeword length of a block code and the number of bits necessary to perform mapping by a set of modulation schemes is solved.
1. A transmission signal generation device, comprising:
an encoder configured to generate a first bit sequence that is an N-bit codeword from a K-bit information bit sequence, where K and N are each an integer greater than or equal to 1;
a bit adjuster configured to (i) judge whether or not to add a known bit sequence to the first bit sequence, and (ii) when judging negatively, output the first bit sequence, and when judging affirmatively, output a second bit sequence that is obtained by adding the known bit sequence to the first bit sequence; and
a mapper configured to modulate the first bit sequence of N bits or the second bit sequence using a modulation scheme selected from among a plurality of modulation schemes, wherein
a modulation symbol of the selected modulation scheme has X bits, where X is an integer greater than or equal to 1,
when N is an integral multiple of X, the bit adjuster does not add the known bit, and
when N is not the integral multiple of X, the bit adjuster adds the known bit of α×X−N bits to the first bit sequence, where α and α×X−N are each an integer greater than or equal to 1.
2. The transmission signal generation device of claim 1 , wherein
the modulation schemes includes any of 16QAM, 64QAM, 128APSK, and 256QAM.
3. A transmission signal generation scheme comprising the steps of:
generating a first bit sequence that is an N-bit codeword from a K-bit information bit sequence, where K and N are each an integer greater than or equal to 1;
judging whether or not to add a known bit sequence to the first bit sequence, and when judging negatively, outputting the first bit sequence, and when judging affirmatively, outputting a second bit sequence that is obtained by adding the known bit sequence to the first bit sequence; and
modulating the first bit sequence of N bits or the second bit sequence using a modulation scheme selected from among a plurality of modulation schemes, wherein
a modulation symbol of the selected modulation scheme has X bits, where X is an integer greater than or equal to 1,
when N is an integral multiple of X, the known bit is not added, and
when N is not the integral multiple of X, the known bit of α×X−N bits is added to the first bit sequence, where α and α×X−N are each an integer greater than or equal to 1.
4. The transmission signal generation scheme of claim 3 , wherein
the modulation schemes includes any of 16QAM, 64QAM, 128APSK, and 256QAM.
5. A reception signal generation device comprising:
a demodulator configured to demodulate a reception signal and output a first bit sequence or a second bit sequence including a known bit;
a bit adjuster configured, when the demodulator outputs the second bit sequence, to output a third bit sequence that is obtained by removing the known bit from the second bit sequence; and
a decoder configured to decode the first bit sequence or the third bit sequence, wherein
the first bit sequence is an N-bit codeword that is generated from a K-bit information bit sequence, where K and N are each an integer greater than or equal to 1,
the second bit sequence is a bit sequence that is obtained by adding the known bit sequence to the first bit sequence,
the reception signal is a signal obtained by modulating the first bit sequence of N bits or the second bit sequence using a modulation scheme selected from among a plurality of modulation schemes,
a modulation symbol of the selected modulation scheme has X bits, where X is an integer greater than or equal to 1, and
when N is not an integral multiple of X, the known bit of α×X−N bits is added to the first bit sequence, where α and α×X−N are each an integer greater than or equal to 1.
6. The reception signal generation device of claim 5 , wherein
the modulation schemes includes any of 16QAM, 64QAM, 128APSK, and 256QAM.
7. A reception signal generation scheme comprising the steps of:
demodulating a reception signal and outputting a first bit sequence or a second bit sequence including a known bit;
outputting, when the second bit sequence is output, a third bit sequence that is obtained by removing the known bit from the second bit sequence; and
decoding the first bit sequence or the third bit sequence, wherein
the first bit sequence is an N-bit codeword that is generated from a K-bit information bit sequence, where K and N are each an integer greater than or equal to 1,
the second bit sequence is a bit sequence that is obtained by adding the known bit sequence to the first bit sequence,
the reception signal is a signal obtained by modulating the first bit sequence of N bits or the second bit sequence using a modulation scheme selected from among a plurality of modulation schemes,
a modulation symbol of the selected modulation scheme has X bits, where X is an integer greater than or equal to 1, and
when N is not an integral multiple of X, the known bit of α×X−N bits is added to the first bit sequence, where α and α×X−N are each an integer greater than or equal to 1.
8. The reception signal generation scheme of claim 7 , wherein
the modulation schemes includes any of 16QAM, 64QAM, 128APSK, and 256QAM.